From patchwork Thu Jul 23 09:07:27 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seiya Wang X-Patchwork-Id: 11680481 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 460B86C1 for ; Thu, 23 Jul 2020 09:08:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 2E7DA2086A for ; Thu, 23 Jul 2020 09:08:04 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="Lk9rxwTo" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726303AbgGWJIA (ORCPT ); Thu, 23 Jul 2020 05:08:00 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:62859 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1725846AbgGWJIA (ORCPT ); Thu, 23 Jul 2020 05:08:00 -0400 X-UUID: 609ee1b2215c485ab6481c4575604080-20200723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:Message-ID:Date:Subject:CC:To:From; bh=fQAlYTu7jimnOiNSbIQbC1bv/gLKYWyftON61ys5CAk=; b=Lk9rxwToEFLLsTkehhDeBHCo0H0jZUGXf0jbhFpJldHRQI8qrBLvNBH0Xy5rpLVyACJxlHz+XahoaimFd//B/8+W42p7chWSbgoOf1nFlwtTNl6bujE1p4QVn5xxqNXMUXvKvLjqpsJL9E5WClRSquxSQKdCn3fHPI+gKjGhwVM=; X-UUID: 609ee1b2215c485ab6481c4575604080-20200723 Received: from mtkcas06.mediatek.inc [(172.21.101.30)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1782811880; Thu, 23 Jul 2020 17:07:54 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n2.mediatek.inc (172.21.101.141) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 23 Jul 2020 17:07:51 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 23 Jul 2020 17:07:46 +0800 From: Seiya Wang To: Greg Kroah-Hartman , Rob Herring , Matthias Brugger , Wim Van Sebroeck , Guenter Roeck CC: , , , , , , Subject: [PATCH 0/4] Add basic node support for Mediatek MT8192 SoC Date: Thu, 23 Jul 2020 17:07:27 +0800 Message-ID: <20200723090731.4482-1-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 MIME-Version: 1.0 X-MTK: N Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org MT8192 is a SoC based on 64bit ARMv8 architecture. It contains 4 CA55 and 4 CA76 cores. MT8192 share many HW IP with MT65xx series. This patchset was tested on MT8192 evaluation board and use correct clock to she ll. Based on v5.8-rc1 Crystal Guo (2): watchdog: mt8192: add wdt support dt-binding: mediatek: mt8192: update mtk-wdt document Seiya Wang (2): arm64: dts: Add Mediatek SoC MT8192 and evaluation board dts and Makefile dt-bindings: serial: Add compatible for Mediatek MT8192 --- This patch depends on [PATCH 1/3] dt-bindings: pinctrl: mt8192: add pinctrl file [PATCH 2/3] dt-bindings: pinctrl: mt8192: add binding document [PATCH v2 3/4] dt-bindings: mediatek: add compatible for MT6873/8192 pwrap [PATCH v2 1/2] dt-bindings: spi: update bindings for MT8192 SoC [PATCH 2/4] clk: mediatek: Add dt-bindings for MT8192 clocks [PATCH 1/4] dt-bindings: ARM: Mediatek: Document bindings for MT8192 Please also accept this patch together with [1][2][3][4][5][6] to avoid build and dt binding check error. [1] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014042.html [2] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014043.html [3] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014546.html [4] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014406.html [5] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014450.html [6] http://lists.infradead.org/pipermail/linux-mediatek/2020-July/014451.html --- .../devicetree/bindings/serial/mtk-uart.txt | 1 + .../devicetree/bindings/watchdog/mtk-wdt.txt | 2 + arch/arm64/boot/dts/mediatek/Makefile | 1 + arch/arm64/boot/dts/mediatek/mt8192-evb.dts | 29 + arch/arm64/boot/dts/mediatek/mt8192.dtsi | 663 +++++++++++++++++++++ drivers/watchdog/mtk_wdt.c | 5 + 6 files changed, 701 insertions(+) create mode 100644 arch/arm64/boot/dts/mediatek/mt8192-evb.dts create mode 100644 arch/arm64/boot/dts/mediatek/mt8192.dtsi -- 2.14.1