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Wed, 3 Nov 2021 16:15:29 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 165.204.84.17) smtp.mailfrom=amd.com; vger.kernel.org; dkim=none (message not signed) header.d=none;vger.kernel.org; dmarc=pass action=none header.from=amd.com; Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB04.amd.com; Received: from SATLEXMB04.amd.com (165.204.84.17) by CO1NAM11FT009.mail.protection.outlook.com (10.13.175.61) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.4669.10 via Frontend Transport; Wed, 3 Nov 2021 16:15:29 +0000 Received: from ethanolxb27ehost.amd.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2308.15; Wed, 3 Nov 2021 11:15:28 -0500 From: Terry Bowman To: CC: , , , , , , Subject: [PATCH v2 0/4] Watchdog: sp5100_tco: Replace watchdog cd6h/cd7h port I/O accesses with MMIO accesses Date: Wed, 3 Nov 2021 11:15:17 -0500 Message-ID: <20211103161521.43447-1-terry.bowman@amd.com> X-Mailer: git-send-email 2.25.1 MIME-Version: 1.0 X-Originating-IP: [10.180.168.240] X-ClientProxiedBy: SATLEXMB04.amd.com (10.181.40.145) To SATLEXMB04.amd.com (10.181.40.145) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-Office365-Filtering-Correlation-Id: d43ff801-9851-4505-ed92-08d99ee52751 X-MS-TrafficTypeDiagnostic: BN9PR12MB5179: X-Microsoft-Antispam-PRVS: X-MS-Oob-TLC-OOBClassifiers: OLM:7219; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 03 Nov 2021 16:15:29.2276 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d43ff801-9851-4505-ed92-08d99ee52751 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: CO1NAM11FT009.eop-nam11.prod.protection.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BN9PR12MB5179 Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org Use MMIO instead of cd6h/cd7h port I/O during EFCH watchdog initialization. EFCH cd6h/cd7h PIO can be disabled and the recommended workaround is to use MMIO. As a result MMIO will be used for EFCH SMBus controller address discovery and starting the EFCH watchdog timer. Update EFCH detection to support future AMD processors. This will support new AMD processors without requiring driver modifications. Patch details: The first patch refactors watchdog timer initialization into a separate function. This is needed for future patches. New functional changes are not added. The second patch splits out existing memory reservation and address mapping into new functions. New functional changes are not added. The third patch introduces EFCH initialization using MMIO. This is required because cd6h/cd7h port I/O can be disabled on recent AMD hardware. The fourth patch adds SMBus controller PCI ID check to enable EFCH MMIO initialization. This eliminates the need for driver updates to support future processors supporting the same EFCH functionality. Testing: Tested on AMD Fam17h and Fam19h processors using: cat >> /dev/watchdog Terry Bowman (4): Watchdog: sp5100_tco: Move timer initialization into function Watchdog: sp5100_tco: Refactor MMIO base address initialization Watchdog: sp5100_tco: Add EFCH SMBus controller initialization using MMIO Watchdog: sp5100_tco: Enable Family 17h+ CPUs drivers/watchdog/sp5100_tco.c | 360 +++++++++++++++++++++++----------- drivers/watchdog/sp5100_tco.h | 6 + 2 files changed, 251 insertions(+), 115 deletions(-) Co-developed-by: Robert Richter Signed-off-by: Robert Richter Signed-off-by: Terry Bowman To: linux-watchdog@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Wim Van Sebroeck Cc: Guenter Roeck Cc: Robert Richter Changes in V2: - Refactor into 4 patch series - Move MMIO reservation and mapping into helper functions - Combine mmio_addr and alternate mmio_addr base address discovery - Replace efch_use_mmio() with efch_mmio layout type