| Message ID | 1553668971-18801-2-git-send-email-hpeter+linux_kernel@gmail.com (mailing list archive) |
|---|---|
| State | Accepted |
| Headers | show |
| Series | [V2,1/2] watchdog: f71808e_wdt: separate declaration and assignment | expand |
On Wed, Mar 27, 2019 at 02:42:51PM +0800, Ji-Ze Hong (Peter Hong) wrote: > Fix error bit operation in watchdog_start() > > Fixes: 14b24a88a3660 ("watchdog: f71808e_wdt: Add F81866 support") > Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/f71808e_wdt.c | 14 +++++++------- > 1 file changed, 7 insertions(+), 7 deletions(-) > > diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c > index bd2ced9f39f4..afd1446241b3 100644 > --- a/drivers/watchdog/f71808e_wdt.c > +++ b/drivers/watchdog/f71808e_wdt.c > @@ -339,6 +339,7 @@ static int f71862fg_pin_configure(unsigned short ioaddr) > static int watchdog_start(void) > { > int err; > + u8 tmp; > > /* Make sure we don't die as soon as the watchdog is enabled below */ > err = watchdog_keepalive(); > @@ -388,19 +389,18 @@ static int watchdog_start(void) > break; > > case f81866: > - /* Set pin 70 to WDTRST# */ > - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, > - BIT(3) | BIT(0)); > - superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, > - BIT(2)); > /* > * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. > * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: > * BIT5: 0 -> WDTRST# > * 1 -> GPIO15 > */ > - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, > - BIT(5)); > + tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL); > + tmp &= ~(BIT(3) | BIT(0)); > + tmp |= BIT(2); > + superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp); > + > + superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); > break; > > default: > -- > 2.7.4 >
diff --git a/drivers/watchdog/f71808e_wdt.c b/drivers/watchdog/f71808e_wdt.c index bd2ced9f39f4..afd1446241b3 100644 --- a/drivers/watchdog/f71808e_wdt.c +++ b/drivers/watchdog/f71808e_wdt.c @@ -339,6 +339,7 @@ static int f71862fg_pin_configure(unsigned short ioaddr) static int watchdog_start(void) { int err; + u8 tmp; /* Make sure we don't die as soon as the watchdog is enabled below */ err = watchdog_keepalive(); @@ -388,19 +389,18 @@ static int watchdog_start(void) break; case f81866: - /* Set pin 70 to WDTRST# */ - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, - BIT(3) | BIT(0)); - superio_set_bit(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, - BIT(2)); /* * GPIO1 Control Register when 27h BIT3:2 = 01 & BIT0 = 0. * The PIN 70(GPIO15/WDTRST) is controlled by 2Ch: * BIT5: 0 -> WDTRST# * 1 -> GPIO15 */ - superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, - BIT(5)); + tmp = superio_inb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL); + tmp &= ~(BIT(3) | BIT(0)); + tmp |= BIT(2); + superio_outb(watchdog.sioaddr, SIO_F81866_REG_PORT_SEL, tmp); + + superio_clear_bit(watchdog.sioaddr, SIO_F81866_REG_GPIO1, 5); break; default:
Fix error bit operation in watchdog_start() Fixes: 14b24a88a3660 ("watchdog: f71808e_wdt: Add F81866 support") Signed-off-by: Ji-Ze Hong (Peter Hong) <hpeter+linux_kernel@gmail.com> --- drivers/watchdog/f71808e_wdt.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-)