From patchwork Thu Jul 30 10:21:48 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Crystal Guo X-Patchwork-Id: 11692725 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DBF6814E3 for ; Thu, 30 Jul 2020 10:22:32 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id C2C412083B for ; Thu, 30 Jul 2020 10:22:32 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="ry4XVukt" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1726814AbgG3KWb (ORCPT ); Thu, 30 Jul 2020 06:22:31 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:65477 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1728897AbgG3KW1 (ORCPT ); Thu, 30 Jul 2020 06:22:27 -0400 X-UUID: 50062b7bbd184cfe929dc849e34609b4-20200730 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=QDlQ0gnoVvfRjOVlPrmnQKeNq40xRyUCNuWe8BeV8Zo=; b=ry4XVuktaP/TGM/JbxU58QN150UIVkmG4RrcRpc9sdrqmGWT4UKJ955kXJCIfbZ24LW5bjXpDylDPYHLeEd6/Aucb6PdJEvENOgV1qWpAowegEMcayBVx2tkaYXNiyCDa0T6gTGHghNOEd+2IksRMXGaVPhjfBTkeIKu/M71sng=; X-UUID: 50062b7bbd184cfe929dc849e34609b4-20200730 Received: from mtkexhb01.mediatek.inc [(172.21.101.102)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 1593641337; Thu, 30 Jul 2020 18:22:23 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 30 Jul 2020 18:22:19 +0800 Received: from localhost.localdomain (10.17.3.153) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 30 Jul 2020 18:22:18 +0800 From: Crystal Guo To: , , CC: , , , , , , Crystal Guo Subject: [v3,3/5] dt-binding: mediatek: mt8192: update mtk-wdt document Date: Thu, 30 Jul 2020 18:21:48 +0800 Message-ID: <1596104510-11113-4-git-send-email-crystal.guo@mediatek.com> X-Mailer: git-send-email 1.8.1.1.dirty In-Reply-To: <1596104510-11113-1-git-send-email-crystal.guo@mediatek.com> References: <1596104510-11113-1-git-send-email-crystal.guo@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org update mtk-wdt document for MT8192 platform Signed-off-by: Crystal Guo --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt index 45eedc2..e36ba60 100644 --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt @@ -12,6 +12,7 @@ Required properties: "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629 "mediatek,mt8183-wdt": for MT8183 "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516 + "mediatek,mt8192-wdt": for MT8192 - reg : Specifies base physical address and size of the registers.