| Message ID | 20190705114522.42565-2-tomas.melin@vaisala.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | watchdog: cadence_wdt: Support all available prescaler values | expand |
On Fri, Jul 05, 2019 at 11:46:02AM +0000, Melin Tomas wrote: > Timeout calculation needs clock frequency, so init clock and calculate > prescaler value eariler in the probe. > earlier; also in subject line > Preparational step for calculating maximum and minimum timeout values > for driver. > > Signed-off-by: Tomas Melin <tomas.melin@vaisala.com> > --- > drivers/watchdog/cadence_wdt.c | 32 ++++++++++++++++---------------- > 1 file changed, 16 insertions(+), 16 deletions(-) > > diff --git a/drivers/watchdog/cadence_wdt.c b/drivers/watchdog/cadence_wdt.c > index c3924356d173..415bd6dd1edb 100644 > --- a/drivers/watchdog/cadence_wdt.c > +++ b/drivers/watchdog/cadence_wdt.c > @@ -295,6 +295,22 @@ static int cdns_wdt_probe(struct platform_device *pdev) > if (!wdt) > return -ENOMEM; > > + wdt->clk = devm_clk_get(&pdev->dev, NULL); > + if (IS_ERR(wdt->clk)) { > + dev_err(&pdev->dev, "input clock not found\n"); > + ret = PTR_ERR(wdt->clk); > + return ret; return PTR_ERR(wdt->clk); [ ok, that is from the old code ... ] > + } > + > + clock_f = clk_get_rate(wdt->clk); > + if (clock_f <= CDNS_WDT_CLK_75MHZ) { > + wdt->prescaler = CDNS_WDT_PRESCALE_512; > + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; > + } else { > + wdt->prescaler = CDNS_WDT_PRESCALE_4096; > + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; > + } > + > cdns_wdt_device = &wdt->cdns_wdt_device; > cdns_wdt_device->info = &cdns_wdt_info; > cdns_wdt_device->ops = &cdns_wdt_ops; > @@ -334,28 +350,12 @@ static int cdns_wdt_probe(struct platform_device *pdev) > watchdog_stop_on_reboot(cdns_wdt_device); > watchdog_set_drvdata(cdns_wdt_device, wdt); > > - wdt->clk = devm_clk_get(&pdev->dev, NULL); > - if (IS_ERR(wdt->clk)) { > - dev_err(&pdev->dev, "input clock not found\n"); > - ret = PTR_ERR(wdt->clk); > - return ret; > - } > - > ret = clk_prepare_enable(wdt->clk); > if (ret) { > dev_err(&pdev->dev, "unable to enable clock\n"); > return ret; > } > The substantial difference here is that clk_prepare_enable() was called before the actual clock rate was retrieved. I don't know if that makes a substantial difference, but on the other side I don't see why the above code isn't moved as well. What I _do_ see, however, is that this patch isn't based on the latest mainline kenrel, since mainline has a call to devm_add_action_or_reset() after clk_prepare_enable(). Please rebase. > - clock_f = clk_get_rate(wdt->clk); > - if (clock_f <= CDNS_WDT_CLK_75MHZ) { > - wdt->prescaler = CDNS_WDT_PRESCALE_512; > - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; > - } else { > - wdt->prescaler = CDNS_WDT_PRESCALE_4096; > - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; > - } > - > spin_lock_init(&wdt->io_lock); > > ret = watchdog_register_device(cdns_wdt_device);
diff --git a/drivers/watchdog/cadence_wdt.c b/drivers/watchdog/cadence_wdt.c index c3924356d173..415bd6dd1edb 100644 --- a/drivers/watchdog/cadence_wdt.c +++ b/drivers/watchdog/cadence_wdt.c @@ -295,6 +295,22 @@ static int cdns_wdt_probe(struct platform_device *pdev) if (!wdt) return -ENOMEM; + wdt->clk = devm_clk_get(&pdev->dev, NULL); + if (IS_ERR(wdt->clk)) { + dev_err(&pdev->dev, "input clock not found\n"); + ret = PTR_ERR(wdt->clk); + return ret; + } + + clock_f = clk_get_rate(wdt->clk); + if (clock_f <= CDNS_WDT_CLK_75MHZ) { + wdt->prescaler = CDNS_WDT_PRESCALE_512; + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; + } else { + wdt->prescaler = CDNS_WDT_PRESCALE_4096; + wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; + } + cdns_wdt_device = &wdt->cdns_wdt_device; cdns_wdt_device->info = &cdns_wdt_info; cdns_wdt_device->ops = &cdns_wdt_ops; @@ -334,28 +350,12 @@ static int cdns_wdt_probe(struct platform_device *pdev) watchdog_stop_on_reboot(cdns_wdt_device); watchdog_set_drvdata(cdns_wdt_device, wdt); - wdt->clk = devm_clk_get(&pdev->dev, NULL); - if (IS_ERR(wdt->clk)) { - dev_err(&pdev->dev, "input clock not found\n"); - ret = PTR_ERR(wdt->clk); - return ret; - } - ret = clk_prepare_enable(wdt->clk); if (ret) { dev_err(&pdev->dev, "unable to enable clock\n"); return ret; } - clock_f = clk_get_rate(wdt->clk); - if (clock_f <= CDNS_WDT_CLK_75MHZ) { - wdt->prescaler = CDNS_WDT_PRESCALE_512; - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_512; - } else { - wdt->prescaler = CDNS_WDT_PRESCALE_4096; - wdt->ctrl_clksel = CDNS_WDT_PRESCALE_SELECT_4096; - } - spin_lock_init(&wdt->io_lock); ret = watchdog_register_device(cdns_wdt_device);
Timeout calculation needs clock frequency, so init clock and calculate prescaler value eariler in the probe. Preparational step for calculating maximum and minimum timeout values for driver. Signed-off-by: Tomas Melin <tomas.melin@vaisala.com> --- drivers/watchdog/cadence_wdt.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-)