From patchwork Thu Jul 23 09:07:31 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Seiya Wang X-Patchwork-Id: 11680491 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 93C5413B6 for ; Thu, 23 Jul 2020 09:08:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 798AD22B43 for ; Thu, 23 Jul 2020 09:08:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="tBh0SDxE" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728001AbgGWJIo (ORCPT ); Thu, 23 Jul 2020 05:08:44 -0400 Received: from mailgw02.mediatek.com ([210.61.82.184]:19453 "EHLO mailgw02.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S1726127AbgGWJIn (ORCPT ); Thu, 23 Jul 2020 05:08:43 -0400 X-UUID: a394200657ba4bb49d41679fa2ec77aa-20200723 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=LkLD6rKD+tyfSOxJ/tFfCgfVHNHDHHwbNbevew2fYZ4=; b=tBh0SDxEkPPTeQ8bV8EjBxN5n90HlyJbdD7ZbLv5syW+VDbcyoOtwWcvqh81YHLZ3gVivyEM1qE1trsYssbaB/uMOTPIX+y5mKBQ54kCYOlkSpBXl9e4NZvbDYGN8n2dzDs5V2bUtR6+QvoDkcs4JOVvmSagTjS0S6C+n/o/hSU=; X-UUID: a394200657ba4bb49d41679fa2ec77aa-20200723 Received: from mtkcas07.mediatek.inc [(172.21.101.84)] by mailgw02.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.10 Build 0809 with TLS) with ESMTP id 125551253; Thu, 23 Jul 2020 17:08:39 +0800 Received: from MTKCAS06.mediatek.inc (172.21.101.30) by mtkmbs07n1.mediatek.inc (172.21.101.16) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 23 Jul 2020 17:08:36 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by MTKCAS06.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 23 Jul 2020 17:08:37 +0800 From: Seiya Wang To: Greg Kroah-Hartman , Rob Herring , Matthias Brugger , Wim Van Sebroeck , Guenter Roeck CC: , , , , , , , Crystal Guo Subject: [PATCH 4/4] dt-binding: mediatek: mt8192: update mtk-wdt document Date: Thu, 23 Jul 2020 17:07:31 +0800 Message-ID: <20200723090731.4482-5-seiya.wang@mediatek.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20200723090731.4482-1-seiya.wang@mediatek.com> References: <20200723090731.4482-1-seiya.wang@mediatek.com> MIME-Version: 1.0 X-MTK: N Sender: linux-watchdog-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-watchdog@vger.kernel.org From: Crystal Guo update mtk-wdt document for MT8192 platform Signed-off-by: Crystal Guo --- Documentation/devicetree/bindings/watchdog/mtk-wdt.txt | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt index 4dd36bd3f1ad..d760ca8a630e 100644 --- a/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt +++ b/Documentation/devicetree/bindings/watchdog/mtk-wdt.txt @@ -12,6 +12,8 @@ Required properties: "mediatek,mt7629-wdt", "mediatek,mt6589-wdt": for MT7629 "mediatek,mt8183-wdt", "mediatek,mt6589-wdt": for MT8183 "mediatek,mt8516-wdt", "mediatek,mt6589-wdt": for MT8516 + "mediatek,mt8192-wdt": for MT8192 + - reg : Specifies base physical address and size of the registers.