| Message ID | 20201029023933.24548-3-zhang.lyra@gmail.com (mailing list archive) |
|---|---|
| State | Changes Requested |
| Headers | show |
| Series | A few fixes to sprd watchdog driver | expand |
On 10/28/20 7:39 PM, Chunyan Zhang wrote: > From: Lingling Xu <ling_ling.xu@unisoc.com> > > As the specification described, users must check busy bit before start > a new loading operation to make sure that the previous loading is done > and the device is ready to accept a new one. > > [ chunyan: Massaged changelog ] > > Fixes: 477603467009 ("watchdog: Add Spreadtrum watchdog driver") > Signed-off-by: Lingling Xu <ling_ling.xu@unisoc.com> > Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com> Reviewed-by: Guenter Roeck <linux@roeck-us.net> > --- > drivers/watchdog/sprd_wdt.c | 25 +++++++++++++------------ > 1 file changed, 13 insertions(+), 12 deletions(-) > > diff --git a/drivers/watchdog/sprd_wdt.c b/drivers/watchdog/sprd_wdt.c > index f3c90b4afead..b9b1daa9e2a4 100644 > --- a/drivers/watchdog/sprd_wdt.c > +++ b/drivers/watchdog/sprd_wdt.c > @@ -108,18 +108,6 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, > u32 tmr_step = timeout * SPRD_WDT_CNT_STEP; > u32 prtmr_step = pretimeout * SPRD_WDT_CNT_STEP; > > - sprd_wdt_unlock(wdt->base); > - writel_relaxed((tmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & > - SPRD_WDT_LOW_VALUE_MASK, wdt->base + SPRD_WDT_LOAD_HIGH); > - writel_relaxed((tmr_step & SPRD_WDT_LOW_VALUE_MASK), > - wdt->base + SPRD_WDT_LOAD_LOW); > - writel_relaxed((prtmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & > - SPRD_WDT_LOW_VALUE_MASK, > - wdt->base + SPRD_WDT_IRQ_LOAD_HIGH); > - writel_relaxed(prtmr_step & SPRD_WDT_LOW_VALUE_MASK, > - wdt->base + SPRD_WDT_IRQ_LOAD_LOW); > - sprd_wdt_lock(wdt->base); > - > /* > * Waiting the load value operation done, > * it needs two or three RTC clock cycles. > @@ -134,6 +122,19 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, > > if (delay_cnt >= SPRD_WDT_LOAD_TIMEOUT) > return -EBUSY; > + > + sprd_wdt_unlock(wdt->base); > + writel_relaxed((tmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & > + SPRD_WDT_LOW_VALUE_MASK, wdt->base + SPRD_WDT_LOAD_HIGH); > + writel_relaxed((tmr_step & SPRD_WDT_LOW_VALUE_MASK), > + wdt->base + SPRD_WDT_LOAD_LOW); > + writel_relaxed((prtmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & > + SPRD_WDT_LOW_VALUE_MASK, > + wdt->base + SPRD_WDT_IRQ_LOAD_HIGH); > + writel_relaxed(prtmr_step & SPRD_WDT_LOW_VALUE_MASK, > + wdt->base + SPRD_WDT_IRQ_LOAD_LOW); > + sprd_wdt_lock(wdt->base); > + > return 0; > } > >
diff --git a/drivers/watchdog/sprd_wdt.c b/drivers/watchdog/sprd_wdt.c index f3c90b4afead..b9b1daa9e2a4 100644 --- a/drivers/watchdog/sprd_wdt.c +++ b/drivers/watchdog/sprd_wdt.c @@ -108,18 +108,6 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, u32 tmr_step = timeout * SPRD_WDT_CNT_STEP; u32 prtmr_step = pretimeout * SPRD_WDT_CNT_STEP; - sprd_wdt_unlock(wdt->base); - writel_relaxed((tmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & - SPRD_WDT_LOW_VALUE_MASK, wdt->base + SPRD_WDT_LOAD_HIGH); - writel_relaxed((tmr_step & SPRD_WDT_LOW_VALUE_MASK), - wdt->base + SPRD_WDT_LOAD_LOW); - writel_relaxed((prtmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & - SPRD_WDT_LOW_VALUE_MASK, - wdt->base + SPRD_WDT_IRQ_LOAD_HIGH); - writel_relaxed(prtmr_step & SPRD_WDT_LOW_VALUE_MASK, - wdt->base + SPRD_WDT_IRQ_LOAD_LOW); - sprd_wdt_lock(wdt->base); - /* * Waiting the load value operation done, * it needs two or three RTC clock cycles. @@ -134,6 +122,19 @@ static int sprd_wdt_load_value(struct sprd_wdt *wdt, u32 timeout, if (delay_cnt >= SPRD_WDT_LOAD_TIMEOUT) return -EBUSY; + + sprd_wdt_unlock(wdt->base); + writel_relaxed((tmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & + SPRD_WDT_LOW_VALUE_MASK, wdt->base + SPRD_WDT_LOAD_HIGH); + writel_relaxed((tmr_step & SPRD_WDT_LOW_VALUE_MASK), + wdt->base + SPRD_WDT_LOAD_LOW); + writel_relaxed((prtmr_step >> SPRD_WDT_CNT_HIGH_SHIFT) & + SPRD_WDT_LOW_VALUE_MASK, + wdt->base + SPRD_WDT_IRQ_LOAD_HIGH); + writel_relaxed(prtmr_step & SPRD_WDT_LOW_VALUE_MASK, + wdt->base + SPRD_WDT_IRQ_LOAD_LOW); + sprd_wdt_lock(wdt->base); + return 0; }