@@ -6,6 +6,7 @@
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
+#include <linux/bcm63xx_wdt.h>
#include <linux/init.h>
#include <linux/memblock.h>
#include <linux/smp.h>
@@ -6,6 +6,7 @@
* Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
*/
+#include <linux/bcm63xx_wdt.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/delay.h>
@@ -441,28 +441,6 @@
#define TIMER_CTL_ENABLE_MASK (1 << 31)
-/*************************************************************************
- * _REG relative to RSET_WDT
- *************************************************************************/
-
-/* Watchdog default count register */
-#define WDT_DEFVAL_REG 0x0
-
-/* Watchdog control register */
-#define WDT_CTL_REG 0x4
-
-/* Watchdog control register constants */
-#define WDT_START_1 (0xff00)
-#define WDT_START_2 (0x00ff)
-#define WDT_STOP_1 (0xee00)
-#define WDT_STOP_2 (0x00ee)
-
-/* Watchdog reset length register */
-#define WDT_RSTLEN_REG 0x8
-
-/* Watchdog soft reset register (BCM6328 only) */
-#define WDT_SOFTRESET_REG 0xc
-
/*************************************************************************
* _REG relative to RSET_GPIO
*************************************************************************/
@@ -1711,7 +1711,7 @@ config OCTEON_WDT
config BCM63XX_WDT
tristate "Broadcom BCM63xx hardware watchdog"
- depends on BCM63XX
+ depends on BCM63XX || COMPILE_TEST
help
Watchdog driver for the built in watchdog hardware in Broadcom
BCM63xx SoC.
@@ -9,6 +9,7 @@
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
+#include <linux/bcm63xx_wdt.h>
#include <linux/bitops.h>
#include <linux/errno.h>
#include <linux/fs.h>
@@ -27,10 +28,10 @@
#include <linux/resource.h>
#include <linux/platform_device.h>
-#include <bcm63xx_cpu.h>
+#ifdef BCM63XX
#include <bcm63xx_io.h>
-#include <bcm63xx_regs.h>
#include <bcm63xx_timer.h>
+#endif
#define PFX KBUILD_MODNAME
@@ -53,26 +54,40 @@ module_param(nowayout, bool, 0);
MODULE_PARM_DESC(nowayout, "Watchdog cannot be stopped once started (default="
__MODULE_STRING(WATCHDOG_NOWAYOUT) ")");
+static void bcm63xx_wdt_write_reg(u32 reg, u32 val)
+{
+ void __iomem *addr = bcm63xx_wdt_device.regs;
+
+ addr += reg;
+#ifdef BCM63XX
+ bcm_writel(val, addr);
+#else
+ writel(val, addr);
+#endif
+}
+
/* HW functions */
static void bcm63xx_wdt_hw_start(void)
{
- bcm_writel(0xfffffffe, bcm63xx_wdt_device.regs + WDT_DEFVAL_REG);
- bcm_writel(WDT_START_1, bcm63xx_wdt_device.regs + WDT_CTL_REG);
- bcm_writel(WDT_START_2, bcm63xx_wdt_device.regs + WDT_CTL_REG);
+ bcm63xx_wdt_write_reg(WDT_DEFVAL_REG, 0xfffffffe);
+ bcm63xx_wdt_write_reg(WDT_CTL_REG, WDT_START_1);
+ bcm63xx_wdt_write_reg(WDT_CTL_REG, WDT_START_2);
}
static void bcm63xx_wdt_hw_stop(void)
{
- bcm_writel(WDT_STOP_1, bcm63xx_wdt_device.regs + WDT_CTL_REG);
- bcm_writel(WDT_STOP_2, bcm63xx_wdt_device.regs + WDT_CTL_REG);
+ bcm63xx_wdt_write_reg(WDT_CTL_REG, WDT_STOP_1);
+ bcm63xx_wdt_write_reg(WDT_CTL_REG, WDT_STOP_2);
}
+#ifdef BCM63XX
static void bcm63xx_wdt_isr(void *data)
{
struct pt_regs *regs = get_irq_regs();
die(PFX " fire", regs);
}
+#endif
static void bcm63xx_timer_tick(struct timer_list *unused)
{
@@ -255,11 +270,13 @@ static int bcm63xx_wdt_probe(struct platform_device *pdev)
return -ENXIO;
}
+#ifdef BCM63XX
ret = bcm63xx_timer_register(TIMER_WDT_ID, bcm63xx_wdt_isr, NULL);
if (ret < 0) {
dev_err(&pdev->dev, "failed to register wdt timer isr\n");
return ret;
}
+#endif
if (bcm63xx_wdt_settimeout(wdt_time)) {
bcm63xx_wdt_settimeout(WDT_DEFAULT_TIME);
@@ -280,7 +297,9 @@ static int bcm63xx_wdt_probe(struct platform_device *pdev)
return 0;
unregister_timer:
+#ifdef BCM63XX
bcm63xx_timer_unregister(TIMER_WDT_ID);
+#endif
return ret;
}
@@ -290,7 +309,9 @@ static int bcm63xx_wdt_remove(struct platform_device *pdev)
bcm63xx_wdt_pause();
misc_deregister(&bcm63xx_wdt_miscdev);
+#ifdef BCM63XX
bcm63xx_timer_unregister(TIMER_WDT_ID);
+#endif
return 0;
}
new file mode 100644
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+
+#ifndef __BCM63XX_WDT_H
+#define __BCM63XX_WDT_H
+
+/* Watchdog default count register */
+#define WDT_DEFVAL_REG 0x0
+
+/* Watchdog control register */
+#define WDT_CTL_REG 0x4
+
+/* Watchdog control register constants */
+#define WDT_START_1 (0xff00)
+#define WDT_START_2 (0x00ff)
+#define WDT_STOP_1 (0xee00)
+#define WDT_STOP_2 (0x00ee)
+
+/* Watchdog reset length register */
+#define WDT_RSTLEN_REG 0x8
+
+/* Watchdog soft reset register (BCM6328 only) */
+#define WDT_SOFTRESET_REG 0xc
+
+#endif /* __BCM63XX_WDT_H */