| Message ID | 20230203-evk-board-support-v5-12-1883c1b405ad@baylibre.com (mailing list archive) |
|---|---|
| State | Handled Elsewhere |
| Headers | show |
| Series | Improve the MT8365 SoC and EVK board support | expand |
+ To: Catalin Marinas <catalin.marinas@arm.com> + To: Will Deacon <will@kernel.org> Sorry for the noise. Regards, Alexandre Le ven. 7 avr. 2023 à 14:59, <amergnat@baylibre.com> a écrit : > > From: Amjad Ouled-Ameur <aouledameur@baylibre.com> > > MT8365 has 3 CPU Idle states: > - MCDI_CPU. (Multi-Core-Deep-Idle) > - MCDI_CLUSTER. > - DPIDLE. (Deep-Idle) > > Signed-off-by: Amjad Ouled-Ameur <aouledameur@baylibre.com> > Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> > Signed-off-by: Alexandre Mergnat <amergnat@baylibre.com> > --- > arch/arm64/boot/dts/mediatek/mt8365.dtsi | 35 ++++++++++++++++++++++++++++++++ > 1 file changed, 35 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > index cfe0c67ad61f..413496c92069 100644 > --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi > @@ -128,6 +128,7 @@ cpu0: cpu@0 { > reg = <0x0>; > #cooling-cells = <2>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; > i-cache-size = <0x8000>; > i-cache-line-size = <64>; > i-cache-sets = <256>; > @@ -147,6 +148,7 @@ cpu1: cpu@1 { > reg = <0x1>; > #cooling-cells = <2>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; > i-cache-size = <0x8000>; > i-cache-line-size = <64>; > i-cache-sets = <256>; > @@ -166,6 +168,7 @@ cpu2: cpu@2 { > reg = <0x2>; > #cooling-cells = <2>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; > i-cache-size = <0x8000>; > i-cache-line-size = <64>; > i-cache-sets = <256>; > @@ -185,6 +188,7 @@ cpu3: cpu@3 { > reg = <0x3>; > #cooling-cells = <2>; > enable-method = "psci"; > + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; > i-cache-size = <0x8000>; > i-cache-line-size = <64>; > i-cache-sets = <256>; > @@ -198,6 +202,37 @@ cpu3: cpu@3 { > operating-points-v2 = <&cluster0_opp>; > }; > > + idle-states { > + entry-method = "psci"; > + > + CPU_MCDI: cpu-mcdi { > + compatible = "arm,idle-state"; > + local-timer-stop; > + arm,psci-suspend-param = <0x00010001>; > + entry-latency-us = <300>; > + exit-latency-us = <200>; > + min-residency-us = <1000>; > + }; > + > + CLUSTER_MCDI: cluster-mcdi { > + compatible = "arm,idle-state"; > + local-timer-stop; > + arm,psci-suspend-param = <0x01010001>; > + entry-latency-us = <350>; > + exit-latency-us = <250>; > + min-residency-us = <1200>; > + }; > + > + CLUSTER_DPIDLE: cluster-dpidle { > + compatible = "arm,idle-state"; > + local-timer-stop; > + arm,psci-suspend-param = <0x01010004>; > + entry-latency-us = <300>; > + exit-latency-us = <800>; > + min-residency-us = <3300>; > + }; > + }; > + > l2: l2-cache { > compatible = "cache"; > cache-level = <2>; > > -- > 2.25.1 >
diff --git a/arch/arm64/boot/dts/mediatek/mt8365.dtsi b/arch/arm64/boot/dts/mediatek/mt8365.dtsi index cfe0c67ad61f..413496c92069 100644 --- a/arch/arm64/boot/dts/mediatek/mt8365.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt8365.dtsi @@ -128,6 +128,7 @@ cpu0: cpu@0 { reg = <0x0>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -147,6 +148,7 @@ cpu1: cpu@1 { reg = <0x1>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -166,6 +168,7 @@ cpu2: cpu@2 { reg = <0x2>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -185,6 +188,7 @@ cpu3: cpu@3 { reg = <0x3>; #cooling-cells = <2>; enable-method = "psci"; + cpu-idle-states = <&CPU_MCDI &CLUSTER_MCDI &CLUSTER_DPIDLE>; i-cache-size = <0x8000>; i-cache-line-size = <64>; i-cache-sets = <256>; @@ -198,6 +202,37 @@ cpu3: cpu@3 { operating-points-v2 = <&cluster0_opp>; }; + idle-states { + entry-method = "psci"; + + CPU_MCDI: cpu-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x00010001>; + entry-latency-us = <300>; + exit-latency-us = <200>; + min-residency-us = <1000>; + }; + + CLUSTER_MCDI: cluster-mcdi { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010001>; + entry-latency-us = <350>; + exit-latency-us = <250>; + min-residency-us = <1200>; + }; + + CLUSTER_DPIDLE: cluster-dpidle { + compatible = "arm,idle-state"; + local-timer-stop; + arm,psci-suspend-param = <0x01010004>; + entry-latency-us = <300>; + exit-latency-us = <800>; + min-residency-us = <3300>; + }; + }; + l2: l2-cache { compatible = "cache"; cache-level = <2>;