From patchwork Sun Feb 28 22:08:52 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Benoit PAPILLAULT X-Patchwork-Id: 82833 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter.kernel.org (8.14.3/8.14.3) with ESMTP id o1SM97LG014643 for ; Sun, 28 Feb 2010 22:09:07 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1032111Ab0B1WJG (ORCPT ); Sun, 28 Feb 2010 17:09:06 -0500 Received: from smtp1-g21.free.fr ([212.27.42.1]:38031 "EHLO smtp1-g21.free.fr" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1032092Ab0B1WJG (ORCPT ); Sun, 28 Feb 2010 17:09:06 -0500 Received: from smtp1-g21.free.fr (localhost [127.0.0.1]) by smtp1-g21.free.fr (Postfix) with ESMTP id 446B6940145; Sun, 28 Feb 2010 23:08:55 +0100 (CET) Received: from xian.sabine-et-benoit.com (ns.popipo.fr [88.163.232.53]) by smtp1-g21.free.fr (Postfix) with ESMTP id 4BBDE9400BC; Sun, 28 Feb 2010 23:08:53 +0100 (CET) Received: by xian.sabine-et-benoit.com (Postfix, from userid 1000) id BA287701B2; Sun, 28 Feb 2010 23:08:52 +0100 (CET) From: Benoit Papillault To: jirislaby@gmail.com, mickflemm@gmail.com Cc: ath5k-devel@venema.h4ckr.net, linux-wireless@vger.kernel.org, Benoit Papillault Subject: [PATCH] ath5k: Fix 64 bits TSF reading. Date: Sun, 28 Feb 2010 23:08:52 +0100 Message-Id: <1267394932-11038-1-git-send-email-benoit.papillault@free.fr> X-Mailer: git-send-email 1.5.6.5 In-Reply-To: <4B8AE8F1.40006@free.fr> References: <4B8AE8F1.40006@free.fr> Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter.kernel.org [140.211.167.41]); Sun, 28 Feb 2010 22:09:08 +0000 (UTC) diff --git a/drivers/net/wireless/ath/ath5k/pcu.c b/drivers/net/wireless/ath/ath5k/pcu.c index aefe84f..4b24c15 100644 --- a/drivers/net/wireless/ath/ath5k/pcu.c +++ b/drivers/net/wireless/ath/ath5k/pcu.c @@ -593,10 +593,27 @@ u32 ath5k_hw_get_tsf32(struct ath5k_hw *ah) */ u64 ath5k_hw_get_tsf64(struct ath5k_hw *ah) { - u64 tsf = ath5k_hw_reg_read(ah, AR5K_TSF_U32); + u32 tsf_lower, tsf_upper; + + /* + * While reading TSF upper and then lower part, the clock is still + * counting so the lower part can rollover just after reading the + * upper part. In this case, we expect the lower part to be quite + * small (let's say less than 100us) and we would just need to read + * the upper part again to get the correct value. + * + * Tested on AR2425 (AR5001) + */ + + tsf_upper = ath5k_hw_reg_read(ah, AR5K_TSF_U32); + tsf_lower = ath5k_hw_reg_read(ah, AR5K_TSF_L32); + + if (tsf_lower < 100) + tsf_upper = ath5k_hw_reg_read(ah, AR5K_TSF_U32); + ATH5K_TRACE(ah->ah_sc); - return ath5k_hw_reg_read(ah, AR5K_TSF_L32) | (tsf << 32); + return (((u64)tsf_upper << 32) | tsf_lower); } /**