From patchwork Tue Mar 1 16:59:36 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vasanthakumar Thiagarajan X-Patchwork-Id: 598651 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p218xu6G029873 for ; Tue, 1 Mar 2011 08:59:56 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755982Ab1CAI7l (ORCPT ); Tue, 1 Mar 2011 03:59:41 -0500 Received: from mail.atheros.com ([12.19.149.2]:43700 "EHLO mail.atheros.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755757Ab1CAI7k (ORCPT ); Tue, 1 Mar 2011 03:59:40 -0500 Received: from mail.atheros.com ([10.10.20.108]) by sidewinder.atheros.com for ; Tue, 01 Mar 2011 00:59:18 -0800 Received: from CHEXHC-01.global.atheros.com (10.12.0.100) by SC1EXHC-02.global.atheros.com (10.10.20.108) with Microsoft SMTP Server (TLS) id 8.2.213.0; Tue, 1 Mar 2011 00:59:39 -0800 Received: from smtpch.atheros.com (10.12.4.43) by CHEXHC-01.global.atheros.com (10.12.0.100) with Microsoft SMTP Server (TLS) id 8.2.176.0; Tue, 1 Mar 2011 14:29:35 +0530 Received: by smtpch.atheros.com (sSMTP sendmail emulation); Tue, 01 Mar 2011 08:59:36 -0800 From: Vasanthakumar Thiagarajan To: CC: Subject: [PATCH] ath9k_hw: Read noise floor only for available chains for AR9003 Date: Tue, 1 Mar 2011 08:59:36 -0800 Message-ID: <1298998776-3903-1-git-send-email-vasanth@atheros.com> X-Mailer: git-send-email 1.7.0.4 MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Tue, 01 Mar 2011 08:59:57 +0000 (UTC) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_phy.c b/drivers/net/wireless/ath/ath9k/ar9003_phy.c index 8d60f4f..eb250d6 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_phy.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_phy.c @@ -1020,28 +1020,29 @@ static bool ar9003_hw_ani_control(struct ath_hw *ah, static void ar9003_hw_do_getnf(struct ath_hw *ah, int16_t nfarray[NUM_NF_READINGS]) { - int16_t nf; - - nf = MS(REG_READ(ah, AR_PHY_CCA_0), AR_PHY_MINCCA_PWR); - nfarray[0] = sign_extend32(nf, 8); - - nf = MS(REG_READ(ah, AR_PHY_CCA_1), AR_PHY_CH1_MINCCA_PWR); - nfarray[1] = sign_extend32(nf, 8); +#define AR_PHY_CH_MINCCA_PWR 0x1FF00000 +#define AR_PHY_CH_MINCCA_PWR_S 20 +#define AR_PHY_CH_EXT_MINCCA_PWR 0x01FF0000 +#define AR_PHY_CH_EXT_MINCCA_PWR_S 16 - nf = MS(REG_READ(ah, AR_PHY_CCA_2), AR_PHY_CH2_MINCCA_PWR); - nfarray[2] = sign_extend32(nf, 8); - - if (!IS_CHAN_HT40(ah->curchan)) - return; + int16_t nf; + int i; - nf = MS(REG_READ(ah, AR_PHY_EXT_CCA), AR_PHY_EXT_MINCCA_PWR); - nfarray[3] = sign_extend32(nf, 8); + for (i = 0; i < AR9300_MAX_CHAINS; i++) { + if (ah->rxchainmask & BIT(i)) { + nf = MS(REG_READ(ah, ah->nf_regs[i]), + AR_PHY_CH_MINCCA_PWR); + nfarray[i] = sign_extend32(nf, 8); - nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_1), AR_PHY_CH1_EXT_MINCCA_PWR); - nfarray[4] = sign_extend32(nf, 8); + if (IS_CHAN_HT40(ah->curchan)) { + u8 ext_idx = AR9300_MAX_CHAINS + i; - nf = MS(REG_READ(ah, AR_PHY_EXT_CCA_2), AR_PHY_CH2_EXT_MINCCA_PWR); - nfarray[5] = sign_extend32(nf, 8); + nf = MS(REG_READ(ah, ah->nf_regs[ext_idx]), + AR_PHY_CH_EXT_MINCCA_PWR); + nfarray[ext_idx] = sign_extend32(nf, 8); + } + } + } } static void ar9003_hw_set_nf_limits(struct ath_hw *ah)