From patchwork Thu Mar 10 05:35:41 2011 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Vivek Natarajan X-Patchwork-Id: 623411 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id p2A5Zo7V003571 for ; Thu, 10 Mar 2011 05:35:52 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751307Ab1CJFfs (ORCPT ); Thu, 10 Mar 2011 00:35:48 -0500 Received: from mail.atheros.com ([12.19.149.2]:51173 "EHLO mail.atheros.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1750957Ab1CJFfs (ORCPT ); Thu, 10 Mar 2011 00:35:48 -0500 Received: from mail.atheros.com ([10.10.20.108]) by sidewinder.atheros.com for ; Wed, 09 Mar 2011 21:35:25 -0800 Received: from smtp.atheros.com (10.12.4.8) by SC1EXHC-02.global.atheros.com (10.10.20.106) with Microsoft SMTP Server (TLS) id 8.2.213.0; Wed, 9 Mar 2011 21:35:46 -0800 Received: by smtp.atheros.com (sSMTP sendmail emulation); Thu, 10 Mar 2011 11:05:43 +0530 From: Vivek Natarajan To: CC: Subject: [PATCH 1/3] ath9k_hw: Improve idle power consumption for AR9485. Date: Thu, 10 Mar 2011 11:05:41 +0530 Message-ID: <1299735343-915-1-git-send-email-vnatarajan@atheros.com> X-Mailer: git-send-email 1.6.3.3 MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.6 (demeter1.kernel.org [140.211.167.41]); Thu, 10 Mar 2011 05:35:52 +0000 (UTC) diff --git a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h index eac4d85..71cc0a3 100644 --- a/drivers/net/wireless/ath/ath9k/ar9485_initvals.h +++ b/drivers/net/wireless/ath/ath9k/ar9485_initvals.h @@ -667,6 +667,7 @@ static const u32 ar9485_1_0_pcie_phy_clkreq_enable_L1[][2] = { static const u32 ar9485_1_0_soc_preamble[][2] = { /* Addr allmodes */ + {0x00004090, 0x00aa10aa}, {0x000040a4, 0x00a0c9c9}, {0x00007048, 0x00000004}, }; @@ -1708,6 +1709,7 @@ static const u32 ar9485_1_1_pcie_phy_clkreq_disable_L1[][2] = { static const u32 ar9485_1_1_soc_preamble[][2] = { /* Addr allmodes */ {0x00004014, 0xba280400}, + {0x00004090, 0x00aa10aa}, {0x000040a4, 0x00a0c9c9}, {0x00007010, 0x00000022}, {0x00007020, 0x00000000},