From patchwork Fri Jun 29 06:40:09 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manoharan, Rajkumar" X-Patchwork-Id: 1130751 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id 44E94DFF34 for ; Fri, 29 Jun 2012 06:39:34 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751727Ab2F2Gjc (ORCPT ); Fri, 29 Jun 2012 02:39:32 -0400 Received: from wolverine01.qualcomm.com ([199.106.114.254]:29297 "EHLO wolverine01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751319Ab2F2Gjb (ORCPT ); Fri, 29 Jun 2012 02:39:31 -0400 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1340951971; x=1372487971; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=+Z4PCbnzoGcucIsyQyFnL4tpDoZ3ta75hQbvQyZUvGA=; b=tx4nNMe8ZLHOXrxVMGexIRJvWBDesQn7/9SGPPdpKRr4khLO5p7f0dik tVdXdi3OxojvkPl+zNOOck2hjL3il0KoTm36B9GOvEdwgHgg78z0bbcrz L2eyl+QP7YFwlEo83wql9rR3vLWM5fqtiH5vtAnTFdNlY7HxS8yLNC78B 4=; X-IronPort-AV: E=McAfee;i="5400,1158,6756"; a="205857570" Received: from ironmsg02-r.qualcomm.com ([172.30.46.16]) by wolverine01.qualcomm.com with ESMTP; 28 Jun 2012 23:39:31 -0700 X-IronPort-AV: E=Sophos;i="4.77,496,1336374000"; d="scan'208";a="159862644" Received: from nasanexhc04.na.qualcomm.com ([172.30.48.17]) by ironmsg02-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 28 Jun 2012 23:39:31 -0700 Received: from qcmail1.qualcomm.com (172.30.48.1) by qcmail1.qualcomm.com (172.30.48.17) with Microsoft SMTP Server (TLS) id 14.2.283.3; Thu, 28 Jun 2012 23:39:29 -0700 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Fri, 29 Jun 2012 12:10:51 +0530 From: Rajkumar Manoharan To: CC: , Rajkumar Manoharan Subject: [PATCH 5/5] ath9k_hw: fix AR9462 2g5g switch on full reset Date: Fri, 29 Jun 2012 12:10:09 +0530 Message-ID: <1340952009-12223-5-git-send-email-rmanohar@qca.qualcomm.com> X-Mailer: git-send-email 1.7.11.1 In-Reply-To: <1340952009-12223-1-git-send-email-rmanohar@qca.qualcomm.com> References: <1340952009-12223-1-git-send-email-rmanohar@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [172.30.48.1] Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org On full reset, mci reset will put LNA update on 2G mode. And Whenever 2g5g_switch is forced at the end of full reset, lna update should not be skipped. Whenever 2g5g switch is enforced, WLAN need not to wait for the completion of MCI messages. Not doing so, is affecting WLAN rx and causing beacon loss when BTCOEX is enabled on AR9462. Signed-off-by: Rajkumar Manoharan --- drivers/net/wireless/ath/ath9k/ar9003_mci.c | 19 +++++++------------ 1 file changed, 7 insertions(+), 12 deletions(-) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_mci.c b/drivers/net/wireless/ath/ath9k/ar9003_mci.c index 6155837..2daa4c1 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_mci.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_mci.c @@ -1010,17 +1010,15 @@ static void ar9003_mci_queue_unsent_gpm(struct ath_hw *ah, u8 header, void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force) { struct ath9k_hw_mci *mci = &ah->btcoex_hw.mci; + bool wait_done = (mci->update_2g5g || !force); if (!mci->update_2g5g && !force) return; if (mci->is_2g) { - if (!force) { - ar9003_mci_send_2g5g_status(ah, true); - - ar9003_mci_send_lna_transfer(ah, true); - udelay(5); - } + ar9003_mci_send_2g5g_status(ah, wait_done); + ar9003_mci_send_lna_transfer(ah, wait_done); + udelay(5); REG_CLR_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); @@ -1030,10 +1028,8 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force) if (!(mci->config & ATH_MCI_CONFIG_DISABLE_OSLA)) ar9003_mci_osla_setup(ah, true); } else { - if (!force) { - ar9003_mci_send_lna_take(ah, true); - udelay(5); - } + ar9003_mci_send_lna_take(ah, wait_done); + udelay(5); REG_SET_BIT(ah, AR_MCI_TX_CTRL, AR_MCI_TX_CTRL_DISABLE_LNA_UPDATE); @@ -1041,8 +1037,7 @@ void ar9003_mci_2g5g_switch(struct ath_hw *ah, bool force) AR_BTCOEX_CTRL_BT_OWN_SPDT_CTRL); ar9003_mci_osla_setup(ah, false); - if (!force) - ar9003_mci_send_2g5g_status(ah, true); + ar9003_mci_send_2g5g_status(ah, wait_done); } }