From patchwork Wed Nov 14 06:28:44 2012 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Manoharan, Rajkumar" X-Patchwork-Id: 1738681 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-process-083081@patchwork2.kernel.org Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by patchwork2.kernel.org (Postfix) with ESMTP id AE5E5DF264 for ; Wed, 14 Nov 2012 06:28:50 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752513Ab2KNG2s (ORCPT ); Wed, 14 Nov 2012 01:28:48 -0500 Received: from sabertooth01.qualcomm.com ([65.197.215.72]:36143 "EHLO sabertooth01.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751883Ab2KNG2s (ORCPT ); Wed, 14 Nov 2012 01:28:48 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1352873629; x=1384409629; h=to:from:cc:subject:date:message-id:in-reply-to: references:mime-version; bh=HOH3xpgU4fNIw+7PqShn00jQ7dxqiQ9VR8jbXAeYnOg=; b=hTSFnojXBlimCvW4gVqMFYLIlG9W9nxwfBBP4iPH8cxrRaOX0Aj7K/Eu KHPKFoWMmBGdZqpZFHcTQKywUR6i4+qoMQBqbuE1yeSr8YARGWRKY3ib/ c1ngLUJDSanQHmguDfJKf+5+cLjdHjHxErVW8rx9OPU8VZw7Q9bqoa7Vn s=; X-IronPort-AV: E=McAfee;i="5400,1158,6895"; a="6705014" Received: from ironmsg04-l.qualcomm.com ([172.30.48.19]) by sabertooth01.qualcomm.com with ESMTP; 13 Nov 2012 22:13:49 -0800 To: X-IronPort-AV: E=McAfee;i="5400,1158,6895"; a="339912257" Received: from nasanexhc07.na.qualcomm.com ([172.30.39.190]) by Ironmsg04-L.qualcomm.com with ESMTP/TLS/RC4-SHA; 13 Nov 2012 22:28:47 -0800 Received: from qcmail1.qualcomm.com (172.30.39.5) by qcmail1.qualcomm.com (172.30.39.190) with Microsoft SMTP Server (TLS) id 14.2.318.1; Tue, 13 Nov 2012 22:28:45 -0800 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Wed, 14 Nov 2012 11:58:55 +0530 From: Rajkumar Manoharan CC: , Rajkumar Manoharan Subject: [PATCH 2/2] qca-swiss-army-knife: refresh 9565 initvals Date: Wed, 14 Nov 2012 11:58:44 +0530 Message-ID: <1352874524-1180-2-git-send-email-rmanohar@qca.qualcomm.com> X-Mailer: git-send-email 1.8.0 In-Reply-To: <1352874524-1180-1-git-send-email-rmanohar@qca.qualcomm.com> References: <1352874524-1180-1-git-send-email-rmanohar@qca.qualcomm.com> MIME-Version: 1.0 X-Originating-IP: [172.30.39.5] Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Enable hw PLL power save to reduce power consumption in sleep state Signed-off-by: Rajkumar Manoharan --- tools/initvals/ar9565_1p0_initvals.h | 4 ++-- tools/initvals/initvals.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/tools/initvals/ar9565_1p0_initvals.h b/tools/initvals/ar9565_1p0_initvals.h index 843e79f..0c2ac0c 100644 --- a/tools/initvals/ar9565_1p0_initvals.h +++ b/tools/initvals/ar9565_1p0_initvals.h @@ -768,9 +768,9 @@ static const u32 ar9565_1p0_Modes_lowest_ob_db_tx_gain_table[][5] = { {0x00016054, 0x00000000, 0x00000000, 0x00000000, 0x00000000}, }; -static const u32 ar9565_1p0_pciephy_pll_on_clkreq_disable_L1[][2] = { +static const u32 ar9565_1p0_pciephy_clkreq_disable_L1[][2] = { /* Addr allmodes */ - {0x00018c00, 0x18212ede}, + {0x00018c00, 0x18213ede}, {0x00018c04, 0x000801d8}, {0x00018c08, 0x0003780c}, }; diff --git a/tools/initvals/initvals.c b/tools/initvals/initvals.c index 525d6cc..9b2fa27 100644 --- a/tools/initvals/initvals.c +++ b/tools/initvals/initvals.c @@ -315,7 +315,7 @@ typedef long long unsigned int u64; #define ar9565_1p0_mac_postamble ar956X_aphrodite_1p0_mac_postamble #define ar9565_1p0_radio_postamble ar956X_aphrodite_1p0_radio_postamble #define ar9565_1p0_Common_rx_gain_table ar956XCommon_rx_gain_table_aphrodite_1p0 -#define ar9565_1p0_pciephy_pll_on_clkreq_disable_L1 ar956X_PciePhy_pll_on_clkreq_disable_L1_aphrodite_1p0 +#define ar9565_1p0_pciephy_clkreq_disable_L1 ar956X_PciePhy_pll_on_clkreq_disable_L1_aphrodite_1p0 #define ar9565_1p0_baseband_postamble_emulation ar956X_aphrodite_1p0_baseband_postamble_emulation #define ar9565_1p0_radio_core ar956X_aphrodite_1p0_radio_core #define ar9565_1p0_baseband_postamble ar956X_aphrodite_1p0_baseband_postamble @@ -780,7 +780,7 @@ static void ar9565_1p0_hw_print_initvals(bool check) INI_PRINT(ar9565_1p0_soc_postamble); INI_PRINT(ar9565_1p0_Common_rx_gain_table); INI_PRINT(ar9565_1p0_Modes_lowest_ob_db_tx_gain_table); - INI_PRINT(ar9565_1p0_pciephy_pll_on_clkreq_disable_L1); + INI_PRINT(ar9565_1p0_pciephy_clkreq_disable_L1); INI_PRINT(ar9565_1p0_modes_fast_clock); INI_PRINT(ar9565_1p0_common_wo_xlna_rx_gain_table); INI_PRINT(ar9565_1p0_modes_low_ob_db_tx_gain_table);