From patchwork Mon Nov 25 13:06:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michal Kazior X-Patchwork-Id: 3230261 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 16A319F816 for ; Mon, 25 Nov 2013 13:11:20 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 67A5A2013D for ; Mon, 25 Nov 2013 13:11:15 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 30365202D1 for ; Mon, 25 Nov 2013 13:11:14 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1755331Ab3KYNKm (ORCPT ); Mon, 25 Nov 2013 08:10:42 -0500 Received: from mail-ea0-f173.google.com ([209.85.215.173]:58556 "EHLO mail-ea0-f173.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753580Ab3KYNK0 (ORCPT ); Mon, 25 Nov 2013 08:10:26 -0500 Received: by mail-ea0-f173.google.com with SMTP id g15so2361382eak.32 for ; Mon, 25 Nov 2013 05:10:25 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=tieto.com; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=pklLCxNoTxif57oEyVZkTXLXxO2P7+D/6ROFnmPQ364=; b=VwtuaMUIXS1HYIyUnN7xO5LJU6AkZm2eYGrC9jOfUwuhEUhbdQF8LexqRAITXERis5 CA3J0ZBAd4F8MNOFxp9kKbaOVYsO4P+1zE7cEe5iHFpckWbxA+uW+4+8j6d9jt7i7A5x s5L9vjHmbNE3BaNY8Y//cEAtP3IRnO89IAo/8= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=pklLCxNoTxif57oEyVZkTXLXxO2P7+D/6ROFnmPQ364=; b=YI+Oc53porwi+/C/zajdiDILKcxW+lohXqeG7MDabfYxawHd8LRz9jMFhjdGi2WucZ Vz1XUmzDUlgRKHnmSjiMJhSjJwe6/96PQMnHZ1WyukIk9TjHzp3vsECucPokouA4OzOe oOMlqE/bFRA8qAU8BG7WAyI946GI8FsGghzAlzHz+iU6iRcNwDAu722FMOLiqr/AwGfu FktUBNtWeXTMLI+TrXsQNURFBbogrElxQbASDeo8GdhRDfVVtIIyeWEU4k1lCfeJA87W ksGmRHXK8wiB5djRYU1dpJEIxACjNXrxqweWqh6ZZaB6Coyg8xJ3y+VW5uevpHK7Cehs NrdQ== X-Gm-Message-State: ALoCoQnFdiV/bvbvnpLBcy0Cs1xrxLuJH5rsUHwSqH7dh/Jpg1t+ewbzCTcnsOPX1W0aNuosz/rBpuzmpfIM3RGQCBMawkdLjwypV2oFVH3OEb0MqZTqDW8= X-Received: by 10.15.24.142 with SMTP id j14mr1961772eeu.52.1385385025325; Mon, 25 Nov 2013 05:10:25 -0800 (PST) Received: from localhost.localdomain ([91.198.246.8]) by mx.google.com with ESMTPSA id b42sm94351396eem.9.2013.11.25.05.10.24 for (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 25 Nov 2013 05:10:24 -0800 (PST) From: Michal Kazior To: ath10k@lists.infradead.org Cc: linux-wireless@vger.kernel.org, Michal Kazior Subject: [PATCH v2 6/8] ath10k: extract functions for legacy irq handling Date: Mon, 25 Nov 2013 14:06:25 +0100 Message-Id: <1385384787-12470-7-git-send-email-michal.kazior@tieto.com> X-Mailer: git-send-email 1.8.4.rc3 In-Reply-To: <1385384787-12470-1-git-send-email-michal.kazior@tieto.com> References: <1385125518-13461-1-git-send-email-michal.kazior@tieto.com> <1385384787-12470-1-git-send-email-michal.kazior@tieto.com> X-DomainID: tieto.com Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,RP_MATCHES_RCVD,T_DKIM_INVALID,UNPARSEABLE_RELAY autolearn=ham version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Preparation for code re-use. Also use ioread/write wrappers. Signed-off-by: Michal Kazior --- v2: * move function definitions up to avoid forward declarations in subsequent patches drivers/net/wireless/ath/ath10k/pci.c | 65 +++++++++++++++++------------------ 1 file changed, 32 insertions(+), 33 deletions(-) diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c index bd67311..1d2939c 100644 --- a/drivers/net/wireless/ath/ath10k/pci.c +++ b/drivers/net/wireless/ath/ath10k/pci.c @@ -220,6 +220,34 @@ static bool ath10k_pci_irq_pending(struct ath10k *ar) return false; } +static void ath10k_pci_disable_and_clear_legacy_irq(struct ath10k *ar) +{ + /* IMPORTANT: INTR_CLR register has to be set after + * INTR_ENABLE is set to 0, otherwise interrupt can not be + * really cleared. */ + ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_ENABLE_ADDRESS, + 0); + ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_CLR_ADDRESS, + PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL); + + /* IMPORTANT: this extra read transaction is required to + * flush the posted write buffer. */ + (void) ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + + PCIE_INTR_ENABLE_ADDRESS); +} + +static void ath10k_pci_enable_legacy_irq(struct ath10k *ar) +{ + ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + + PCIE_INTR_ENABLE_ADDRESS, + PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL); + + /* IMPORTANT: this extra read transaction is required to + * flush the posted write buffer. */ + (void) ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + + PCIE_INTR_ENABLE_ADDRESS); +} + /* * Diagnostic read/write access is provided for startup/config/debug usage. * Caller must guarantee proper alignment, when applicable, and single user @@ -2128,25 +2156,7 @@ static irqreturn_t ath10k_pci_interrupt_handler(int irq, void *arg) if (!ath10k_pci_irq_pending(ar)) return IRQ_NONE; - /* - * IMPORTANT: INTR_CLR regiser has to be set after - * INTR_ENABLE is set to 0, otherwise interrupt can not be - * really cleared. - */ - iowrite32(0, ar_pci->mem + - (SOC_CORE_BASE_ADDRESS | - PCIE_INTR_ENABLE_ADDRESS)); - iowrite32(PCIE_INTR_FIRMWARE_MASK | - PCIE_INTR_CE_MASK_ALL, - ar_pci->mem + (SOC_CORE_BASE_ADDRESS | - PCIE_INTR_CLR_ADDRESS)); - /* - * IMPORTANT: this extra read transaction is required to - * flush the posted write buffer. - */ - (void) ioread32(ar_pci->mem + - (SOC_CORE_BASE_ADDRESS | - PCIE_INTR_ENABLE_ADDRESS)); + ath10k_pci_disable_and_clear_legacy_irq(ar); } tasklet_schedule(&ar_pci->intr_tq); @@ -2162,20 +2172,9 @@ static void ath10k_pci_tasklet(unsigned long data) ath10k_pci_fw_interrupt_handler(ar); /* FIXME: Handle FW error */ ath10k_ce_per_engine_service_any(ar); - if (ar_pci->num_msi_intrs == 0) { - /* Enable Legacy PCI line interrupts */ - iowrite32(PCIE_INTR_FIRMWARE_MASK | - PCIE_INTR_CE_MASK_ALL, - ar_pci->mem + (SOC_CORE_BASE_ADDRESS | - PCIE_INTR_ENABLE_ADDRESS)); - /* - * IMPORTANT: this extra read transaction is required to - * flush the posted write buffer - */ - (void) ioread32(ar_pci->mem + - (SOC_CORE_BASE_ADDRESS | - PCIE_INTR_ENABLE_ADDRESS)); - } + /* Re-enable legacy irq that was disabled in the irq handler */ + if (ar_pci->num_msi_intrs == 0) + ath10k_pci_enable_legacy_irq(ar); } static int ath10k_pci_request_irq_msix(struct ath10k *ar)