From patchwork Mon Jan 26 22:25:18 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Peter Oh X-Patchwork-Id: 5712751 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork1.web.kernel.org (Postfix) with ESMTP id EBBB39F2ED for ; Mon, 26 Jan 2015 22:27:04 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 395A32018E for ; Mon, 26 Jan 2015 22:27:04 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2A90020149 for ; Mon, 26 Jan 2015 22:27:03 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1756553AbbAZW1A (ORCPT ); Mon, 26 Jan 2015 17:27:00 -0500 Received: from sabertooth02.qualcomm.com ([65.197.215.38]:46374 "EHLO sabertooth02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753431AbbAZW1A (ORCPT ); Mon, 26 Jan 2015 17:27:00 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qca.qualcomm.com; i=@qca.qualcomm.com; q=dns/txt; s=qcdkim; t=1422311221; x=1453847221; h=from:to:cc:subject:date:message-id:mime-version; bh=FfkbKr/gTDF7Hrae7CGW2FuSJo8v57lgY14e4FI2XaI=; b=h5429JailUe7o+559uGUbHds9XHhKgLtnJkSjmvos0dcuNNQcYXXmi0Q 8F0WBixbnckygedAYbZIYB5ywvgnJFD2OyPNayUMvf8ZoViZBVgPLRYB5 bb5qkRXG2TfNXceLOwtwIRwt3cVOpFZWTlxp8znVa6qpFOX66+y8GNASK 0=; X-IronPort-AV: E=McAfee;i="5600,1067,7693"; a="82935485" Received: from ironmsg03-r.qualcomm.com ([172.30.46.17]) by sabertooth02.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 26 Jan 2015 14:27:01 -0800 X-IronPort-AV: E=Sophos;i="5.09,470,1418112000"; d="scan'208";a="838320387" Received: from nasanexm01b.na.qualcomm.com ([10.85.0.82]) by Ironmsg03-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 26 Jan 2015 14:26:59 -0800 Received: from poh-linux2.qualcomm.com (10.80.80.8) by NASANEXM01B.na.qualcomm.com (10.85.0.82) with Microsoft SMTP Server (TLS) id 15.0.995.29; Mon, 26 Jan 2015 14:26:58 -0800 From: Peter Oh To: CC: Subject: [PATCH] ath10k: Replace ioread with wmb for data sync Date: Mon, 26 Jan 2015 14:25:18 -0800 Message-ID: <1422311118-11320-1-git-send-email-poh@qca.qualcomm.com> X-Mailer: git-send-email 1.9.1 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: NASANEXM01B.na.qualcomm.com (10.85.0.82) To NASANEXM01B.na.qualcomm.com (10.85.0.82) Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Using ioread() to perform data sync is excessive. Use compact API, wmb(), that intended to be used for the case. It reduces total 14 CPU clocks per interrupt. Signed-off-by: Peter Oh --- drivers/net/wireless/ath/ath10k/pci.c | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/net/wireless/ath/ath10k/pci.c b/drivers/net/wireless/ath/ath10k/pci.c index 3b40a86..c353a2c 100644 --- a/drivers/net/wireless/ath/ath10k/pci.c +++ b/drivers/net/wireless/ath/ath10k/pci.c @@ -346,10 +346,8 @@ static void ath10k_pci_disable_and_clear_legacy_irq(struct ath10k *ar) ath10k_pci_write32(ar, SOC_CORE_BASE_ADDRESS + PCIE_INTR_CLR_ADDRESS, PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL); - /* IMPORTANT: this extra read transaction is required to - * flush the posted write buffer. */ - (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + - PCIE_INTR_ENABLE_ADDRESS); + /* invoke data sync barrier */ + wmb(); } static void ath10k_pci_enable_legacy_irq(struct ath10k *ar) @@ -358,10 +356,8 @@ static void ath10k_pci_enable_legacy_irq(struct ath10k *ar) PCIE_INTR_ENABLE_ADDRESS, PCIE_INTR_FIRMWARE_MASK | PCIE_INTR_CE_MASK_ALL); - /* IMPORTANT: this extra read transaction is required to - * flush the posted write buffer. */ - (void)ath10k_pci_read32(ar, SOC_CORE_BASE_ADDRESS + - PCIE_INTR_ENABLE_ADDRESS); + /* invoke data sync barrier */ + wmb(); } static inline const char *ath10k_pci_get_irq_method(struct ath10k *ar)