From patchwork Fri Feb 6 11:47:17 2015 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Rajkumar Manoharan X-Patchwork-Id: 5789661 Return-Path: X-Original-To: patchwork-linux-wireless@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.29.136]) by patchwork2.web.kernel.org (Postfix) with ESMTP id C0928BF440 for ; Fri, 6 Feb 2015 11:47:42 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 00CF120165 for ; Fri, 6 Feb 2015 11:47:42 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id CF35620125 for ; Fri, 6 Feb 2015 11:47:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752756AbbBFLrj (ORCPT ); Fri, 6 Feb 2015 06:47:39 -0500 Received: from wolverine02.qualcomm.com ([199.106.114.251]:12263 "EHLO wolverine02.qualcomm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751168AbbBFLri (ORCPT ); Fri, 6 Feb 2015 06:47:38 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=simple/simple; d=qti.qualcomm.com; i=@qti.qualcomm.com; q=dns/txt; s=qcdkim; t=1423223258; x=1454759258; h=from:to:cc:subject:date:message-id:mime-version; bh=iVSvzMNpvH1z5CjsXFGinTwBANRLgRIE7tWfiBVp5K0=; b=Q8SVvfwrhh/KQzF21P+cwJLYZqjncVEu2YWGhyk6WF5HtmG9PWYqxOP2 SnszC/HT8rarVd743GIS9BJI6DsQUb71uxgaQYf8pPPijT10V1oF2P2CU XMMyNTqVPSpxmEGsEavwvzsITKqtYSpvvCvcifmR98yrQ8QnSKzLekQSu g=; X-IronPort-AV: E=McAfee;i="5600,1067,7703"; a="194229130" Received: from ironmsg03-r.qualcomm.com ([172.30.46.17]) by wolverine02.qualcomm.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 06 Feb 2015 03:47:37 -0800 X-IronPort-AV: E=Sophos;i="5.09,529,1418112000"; d="scan'208";a="845979659" Received: from nasanexm01e.na.qualcomm.com ([10.85.0.31]) by Ironmsg03-R.qualcomm.com with ESMTP/TLS/RC4-SHA; 06 Feb 2015 03:47:38 -0800 Received: from aphydexm01b.ap.qualcomm.com (10.252.127.11) by NASANEXM01E.na.qualcomm.com (10.85.0.31) with Microsoft SMTP Server (TLS) id 15.0.995.29; Fri, 6 Feb 2015 03:47:37 -0800 Received: from qcmail1.qualcomm.com (10.80.80.8) by aphydexm01b.ap.qualcomm.com (10.252.127.11) with Microsoft SMTP Server (TLS) id 15.0.995.29; Fri, 6 Feb 2015 03:47:30 -0800 Received: by qcmail1.qualcomm.com (sSMTP sendmail emulation); Fri, 06 Feb 2015 17:17:21 +0530 From: Rajkumar Manoharan To: CC: , Rajkumar Manoharan Subject: [PATCH 1/2] ath10k: Bypass PLL setting on target init for QCA9888 Date: Fri, 6 Feb 2015 17:17:17 +0530 Message-ID: <1423223238-17530-1-git-send-email-rmanohar@qti.qualcomm.com> X-Mailer: git-send-email 2.2.2 MIME-Version: 1.0 X-Originating-IP: [10.80.80.8] X-ClientProxiedBy: nasanexm01a.na.qualcomm.com (10.85.0.81) To aphydexm01b.ap.qualcomm.com (10.252.127.11) Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Spam-Status: No, score=-6.8 required=5.0 tests=BAYES_00,DKIM_SIGNED, RCVD_IN_DNSWL_HI,T_DKIM_INVALID,T_RP_MATCHES_RCVD,UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Some of of qca988x solutions are having global reset issue during target initialization. Bypassing PLL setting before downloading firmware and letting the SoC run on REF_CLK is fixing the problem. Corresponding firmware change is also needed to set the clock source once the target is initialized. Since 10.2.4 firmware is having this ROM patch, applying skip_clock_init only for 10.2.4 firmware versions. Signed-off-by: Rajkumar Manoharan --- drivers/net/wireless/ath/ath10k/core.c | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/net/wireless/ath/ath10k/core.c b/drivers/net/wireless/ath/ath10k/core.c index 310e12b..3119192 100644 --- a/drivers/net/wireless/ath/ath10k/core.c +++ b/drivers/net/wireless/ath/ath10k/core.c @@ -797,6 +797,20 @@ static int ath10k_download_cal_data(struct ath10k *ar) ar->cal_mode = ATH10K_CAL_MODE_OTP; done: + if ((ar->hw_rev != ATH10K_HW_QCA988X) || + (ar->wmi.op_version != ATH10K_FW_WMI_OP_VERSION_10_2_4)) { + ath10k_dbg(ar, ATH10K_DBG_BOOT, + "boot using calibration mode %s\n", + ath10k_cal_mode_str(ar->cal_mode)); + return 0; + } + + ret = ath10k_bmi_write32(ar, hi_skip_clock_init, 1); + if (ret) { + ath10k_err(ar, "could not write skip_clock_init (%d)\n", ret); + return ret; + } + ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n", ath10k_cal_mode_str(ar->cal_mode)); return 0;