From patchwork Tue Jun 13 14:48:51 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Amitkumar Karwar X-Patchwork-Id: 9784163 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id 674A560212 for ; Tue, 13 Jun 2017 14:51:41 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 5BA2E1FF0B for ; Tue, 13 Jun 2017 14:51:41 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 5095C2870D; Tue, 13 Jun 2017 14:51:41 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.0 required=2.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID, DKIM_VALID_AU, FREEMAIL_FROM, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 32FDD2872C for ; Tue, 13 Jun 2017 14:51:40 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1753535AbdFMOvi (ORCPT ); Tue, 13 Jun 2017 10:51:38 -0400 Received: from mail-pf0-f194.google.com ([209.85.192.194]:33611 "EHLO mail-pf0-f194.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1753607AbdFMOvh (ORCPT ); Tue, 13 Jun 2017 10:51:37 -0400 Received: by mail-pf0-f194.google.com with SMTP id w12so11942347pfk.0 for ; Tue, 13 Jun 2017 07:51:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=vRulpqwk6Bwo0QF8r3wg4Us2jep0XaxHAxiRdTPSxoY=; b=IVzMHpHglcPeZAbBFHraK9S56PnDJ42QqogkPb1dxEGH/dXvl/ED+WyWefQmpbmvlX HNjhp/CFUX898vBYZzMaCKnBMIHlp7SFpHgvBiy75/DkdZmSGWOY+dDx0pkXvMzOre9t emZrrkG9lNWNL+4CpEOkPOzuhNs5yYnyYHYhciCEzQsSa5evDSXdEqQvdjsQ6HnTB/69 9qGbYRU6qFIcd/HSmRUehyyb3iHEcPdQA9sdSLnQLY3rvVFTsPJjRPUU92/pPW88OHQv 9mHKdV8I7IYOFIHDUyqaR+gb94zUN6ZOs8OyF7kePv/5jnY3qgvgE4E13FW7FE6VQMwo uuIw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=vRulpqwk6Bwo0QF8r3wg4Us2jep0XaxHAxiRdTPSxoY=; b=cPdLFYTMEDJY3lNQyg62CTcH+vZ8Qgv/gaqqnS0qOuGg2wlsE0HtHtY0xHg0UJyUUL EXDz0pzEsPLkas9IcQ68E+O8ZruehXKe48obPcWQjqzqvJ7B7t09qqYXzW6nNIUbhBkr Ghfa+HERUYHOzBQ5DVfyFB0zTT3pAkfrUSeZIIlPsdZ3nopxu3GEuePxoZuEvqvo1Am7 dxUXm4qnSuX33Hf/Ch8ll+mrbvhU0c/r+y9dCFVtq465lMkarJlqeLy5wK2Fze2jL3bD vzLq3SjKgAh+TOJ0PG7J7J+gYdNMhZ3VQ2em9YnycDwKil76gnFyRcAGqlC0cy/Y5JQS WsQA== X-Gm-Message-State: AKS2vOx4k7KfUey8RMON64qESbBC2NUwwq3zYTIFsKTx5kb1cSo1WIWb Oqr2Y1DuPXoOCdfFXY4= X-Received: by 10.84.133.100 with SMTP id 91mr288080plf.106.1497365496953; Tue, 13 Jun 2017 07:51:36 -0700 (PDT) Received: from cpu185.redpinesignals.com ([203.196.161.90]) by smtp.gmail.com with ESMTPSA id n4sm25212090pgt.3.2017.06.13.07.51.34 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Tue, 13 Jun 2017 07:51:36 -0700 (PDT) From: Amitkumar Karwar X-Google-Original-From: Amitkumar Karwar To: Kalle Valo Cc: linux-wireless@vger.kernel.org, Alexey.Brodkin@synopsys.com, Amitkumar Karwar , Karun Eagalapati , Amitkumar Karwar Subject: [PATCH 03/20] rsi: chip reset for SDIO interface Date: Tue, 13 Jun 2017 20:18:51 +0530 Message-Id: <1497365348-2305-4-git-send-email-amit.karwar@redpinesignals.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497365348-2305-1-git-send-email-amit.karwar@redpinesignals.com> References: <1497365348-2305-1-git-send-email-amit.karwar@redpinesignals.com> Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP From: Karun Eagalapati We need to reset the chip in teardown path so that it can work next time when driver is loaded. This patch adds support for this reset configuration for SDIO. Signed-off-by: Karun Eagalapati Signed-off-by: Amitkumar Karwar --- drivers/net/wireless/rsi/rsi_91x_sdio.c | 80 ++++++++++++++++++++++++++++++++- drivers/net/wireless/rsi/rsi_hal.h | 33 ++++++++++++++ drivers/net/wireless/rsi/rsi_sdio.h | 1 + 3 files changed, 113 insertions(+), 1 deletion(-) diff --git a/drivers/net/wireless/rsi/rsi_91x_sdio.c b/drivers/net/wireless/rsi/rsi_91x_sdio.c index b5ac503..ebfd29c 100644 --- a/drivers/net/wireless/rsi/rsi_91x_sdio.c +++ b/drivers/net/wireless/rsi/rsi_91x_sdio.c @@ -933,6 +933,84 @@ static int rsi_probe(struct sdio_func *pfunction, return 1; } +static void ulp_read_write(struct rsi_hw *adapter, u16 addr, u32 data, + u16 len_in_bits) +{ + rsi_sdio_master_reg_write(adapter, RSI_GSPI_DATA_REG1, + ((addr << 6) | ((data >> 16) & 0xffff)), 2); + rsi_sdio_master_reg_write(adapter, RSI_GSPI_DATA_REG0, + (data & 0xffff), 2); + rsi_sdio_master_reg_write(adapter, RSI_GSPI_CTRL_REG0, + RSI_GSPI_CTRL_REG0_VALUE, 2); + rsi_sdio_master_reg_write(adapter, RSI_GSPI_CTRL_REG1, + ((len_in_bits - 1) | RSI_GSPI_TRIG), 2); + msleep(20); +} + +/*This function resets and re-initializes the chip.*/ +static void rsi_reset_chip(struct rsi_hw *adapter) +{ + __le32 data; + u8 sdio_interrupt_status = 0; + u8 request = 1; + int ret; + + rsi_dbg(INFO_ZONE, "Writing disable to wakeup register\n"); + ret = rsi_sdio_write_register(adapter, 0, SDIO_WAKEUP_REG, &request); + if (ret < 0) { + rsi_dbg(ERR_ZONE, + "%s: Failed to write SDIO wakeup register\n", __func__); + return; + } + msleep(20); + ret = rsi_sdio_read_register(adapter, RSI_FN1_INT_REGISTER, + &sdio_interrupt_status); + if (ret < 0) { + rsi_dbg(ERR_ZONE, "%s: Failed to Read Intr Status Register\n", + __func__); + return; + } + rsi_dbg(INFO_ZONE, "%s: Intr Status Register value = %d\n", + __func__, sdio_interrupt_status); + + /* Put Thread-Arch processor on hold */ + if (rsi_sdio_master_access_msword(adapter, TA_BASE_ADDR)) { + rsi_dbg(ERR_ZONE, + "%s: Unable to set ms word to common reg\n", + __func__); + return; + } + + data = TA_HOLD_THREAD_VALUE; + if (rsi_sdio_write_register_multiple(adapter, TA_HOLD_THREAD_REG | + RSI_SD_REQUEST_MASTER, + (u8 *)&data, 4)) { + rsi_dbg(ERR_ZONE, + "%s: Unable to hold Thread-Arch processor threads\n", + __func__); + return; + } + + /* This msleep will ensure Thread-Arch processor to go to hold + * and any pending dma transfers to rf spi in device to finish. + */ + msleep(100); + + ulp_read_write(adapter, RSI_ULP_RESET_REG, RSI_ULP_WRITE_0, 32); + ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_1, RSI_ULP_WRITE_2, 32); + ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_2, RSI_ULP_WRITE_0, 32); + ulp_read_write(adapter, RSI_WATCH_DOG_DELAY_TIMER_1, RSI_ULP_WRITE_50, + 32); + ulp_read_write(adapter, RSI_WATCH_DOG_DELAY_TIMER_2, RSI_ULP_WRITE_0, + 32); + ulp_read_write(adapter, RSI_WATCH_DOG_TIMER_ENABLE, + RSI_ULP_TIMER_ENABLE, 32); + /* This msleep will be sufficient for the ulp + * read write operations to complete for chip reset. + */ + msleep(500); +} + /** * rsi_disconnect() - This function performs the reverse of the probe function. * @pfunction: Pointer to the sdio_func structure. @@ -956,7 +1034,7 @@ static void rsi_disconnect(struct sdio_func *pfunction) sdio_release_irq(pfunction); sdio_disable_func(pfunction); rsi_91x_deinit(adapter); - /* Resetting to take care of the case, where-in driver is re-loaded */ + rsi_reset_chip(adapter); rsi_reset_card(pfunction); sdio_release_host(pfunction); } diff --git a/drivers/net/wireless/rsi/rsi_hal.h b/drivers/net/wireless/rsi/rsi_hal.h index 902dc54..3179e86 100644 --- a/drivers/net/wireless/rsi/rsi_hal.h +++ b/drivers/net/wireless/rsi/rsi_hal.h @@ -52,6 +52,39 @@ #define FW_LOADING_SUCCESSFUL 'S' #define LOADING_INITIATED '1' +#define RSI_ULP_RESET_REG 0x161 +#define RSI_WATCH_DOG_TIMER_1 0x16c +#define RSI_WATCH_DOG_TIMER_2 0x16d +#define RSI_WATCH_DOG_DELAY_TIMER_1 0x16e +#define RSI_WATCH_DOG_DELAY_TIMER_2 0x16f +#define RSI_WATCH_DOG_TIMER_ENABLE 0x170 + +#define RSI_ULP_WRITE_0 00 +#define RSI_ULP_WRITE_2 02 +#define RSI_ULP_WRITE_50 50 + +#define RSI_RESTART_WDT BIT(11) +#define RSI_BYPASS_ULP_ON_WDT BIT(1) + +#define RSI_ULP_TIMER_ENABLE ((0xaa000) | RSI_RESTART_WDT | \ + RSI_BYPASS_ULP_ON_WDT) +#define RSI_RF_SPI_PROG_REG_BASE_ADDR 0x40080000 + +#define RSI_GSPI_CTRL_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR) +#define RSI_GSPI_CTRL_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x2) +#define RSI_GSPI_DATA_REG0 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x4) +#define RSI_GSPI_DATA_REG1 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x6) +#define RSI_GSPI_DATA_REG2 (RSI_RF_SPI_PROG_REG_BASE_ADDR + 0x8) + +#define RSI_GSPI_CTRL_REG0_VALUE 0x340 + +#define RSI_GSPI_DMA_MODE BIT(13) + +#define RSI_GSPI_2_ULP BIT(12) +#define RSI_GSPI_TRIG BIT(7) +#define RSI_GSPI_READ BIT(6) +#define RSI_GSPI_RF_SPI_ACTIVE BIT(8) + /* Boot loader commands */ #define SEND_RPS_FILE '2' diff --git a/drivers/net/wireless/rsi/rsi_sdio.h b/drivers/net/wireless/rsi/rsi_sdio.h index 9fb73f6..f11f818 100644 --- a/drivers/net/wireless/rsi/rsi_sdio.h +++ b/drivers/net/wireless/rsi/rsi_sdio.h @@ -58,6 +58,7 @@ enum sdio_interrupt_type { #define SDIO_READ_START_LVL 0x000FC #define SDIO_READ_FIFO_CTL 0x000FD #define SDIO_WRITE_FIFO_CTL 0x000FE +#define SDIO_WAKEUP_REG 0x000FF #define SDIO_FUN1_INTR_CLR_REG 0x0008 #define SDIO_REG_HIGH_SPEED 0x0013