From patchwork Wed Feb 21 16:12:11 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ajay Singh X-Patchwork-Id: 10233395 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork.web.codeaurora.org (Postfix) with ESMTP id E6B6860392 for ; Wed, 21 Feb 2018 16:12:32 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id D996F2879C for ; Wed, 21 Feb 2018 16:12:32 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id CE3A62881A; Wed, 21 Feb 2018 16:12:32 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.9 required=2.0 tests=BAYES_00,RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 73ED72879C for ; Wed, 21 Feb 2018 16:12:32 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S966312AbeBUQMb (ORCPT ); Wed, 21 Feb 2018 11:12:31 -0500 Received: from esa5.microchip.iphmx.com ([216.71.150.166]:19954 "EHLO esa5.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S966305AbeBUQM3 (ORCPT ); Wed, 21 Feb 2018 11:12:29 -0500 X-IronPort-AV: E=Sophos;i="5.46,543,1511852400"; d="scan'208";a="9440483" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa5.microchip.iphmx.com with ESMTP/TLS/DHE-RSA-AES256-SHA; 21 Feb 2018 09:12:29 -0700 Received: from ajaysk-VirtualBox.mchp-main.com (10.10.76.4) by chn-sv-exch07.mchp-main.com (10.10.76.108) with Microsoft SMTP Server id 14.3.352.0; Wed, 21 Feb 2018 09:12:28 -0700 From: Ajay Singh To: CC: , , , , , , , Ajay Singh Subject: [PATCH 3/4] staging: wilc1000: refactor wilc_spi_clear_int_ext() by using GENMASK macro Date: Wed, 21 Feb 2018 21:42:11 +0530 Message-ID: <1519229532-11265-4-git-send-email-ajay.kathat@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1519229532-11265-1-git-send-email-ajay.kathat@microchip.com> References: <1519229532-11265-1-git-send-email-ajay.kathat@microchip.com> MIME-Version: 1.0 Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Use available macro GENMASK to get the bitmask value of specific value. Simplified the logic by adding expected_irqs & unexpected_irqs to check the interrupt bits. Signed-off-by: Ajay Singh --- drivers/staging/wilc1000/wilc_spi.c | 46 +++++++++++++++---------------------- 1 file changed, 18 insertions(+), 28 deletions(-) diff --git a/drivers/staging/wilc1000/wilc_spi.c b/drivers/staging/wilc1000/wilc_spi.c index c63f534..12827c2 100644 --- a/drivers/staging/wilc1000/wilc_spi.c +++ b/drivers/staging/wilc1000/wilc_spi.c @@ -985,8 +985,9 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) { struct spi_device *spi = to_spi_device(wilc->dev); int ret; - u32 flags; u32 tbl_ctl; + u32 expected_irqs, unexpected_irqs; + int i; if (g_spi.has_thrpt_enh) { ret = spi_internal_write(wilc, 0xe844 - WILC_SPI_REG_BASE, @@ -994,37 +995,26 @@ static int wilc_spi_clear_int_ext(struct wilc *wilc, u32 val) return ret; } - flags = val & (BIT(MAX_NUM_INT) - 1); - if (flags) { - int i; + expected_irqs = val & GENMASK(g_spi.nint - 1, 0); + unexpected_irqs = val & GENMASK(MAX_NUM_INT - 1, g_spi.nint); - ret = 1; - for (i = 0; i < g_spi.nint; i++) { - /* - * No matter what you write 1 or 0, - * it will clear interrupt. - */ - if (flags & 1) - ret = wilc_spi_write_reg(wilc, - 0x10c8 + i * 4, 1); - if (!ret) - break; - flags >>= 1; - } - if (!ret) { - dev_err(&spi->dev, - "Failed wilc_spi_write_reg, set reg %x ...\n", - 0x10c8 + i * 4); - goto _fail_; - } - for (i = g_spi.nint; i < MAX_NUM_INT; i++) { - if (flags & 1) + for (i = 0; i < g_spi.nint && expected_irqs; i++) { + /* No matter what you write 1 or 0, it will clear interrupt. */ + if (expected_irqs & BIT(i)) { + ret = wilc_spi_write_reg(wilc, 0x10c8 + i * 4, 1); + if (!ret) { dev_err(&spi->dev, - "Unexpected interrupt cleared %d...\n", - i); - flags >>= 1; + "Failed wilc_spi_write_reg, set reg %x ...\n", + 0x10c8 + i * 4); + goto _fail_; + } } } + for (i = g_spi.nint; i < MAX_NUM_INT && unexpected_irqs; i++) { + if (unexpected_irqs & BIT(i)) + dev_err(&spi->dev, + "Unexpected interrupt cleared %d...\n", i); + } tbl_ctl = 0; /* select VMM table 0 */