From patchwork Wed Nov 4 17:33:57 2009 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Bartlomiej Zolnierkiewicz X-Patchwork-Id: 57730 Received: from vger.kernel.org (vger.kernel.org [209.132.176.167]) by demeter.kernel.org (8.14.2/8.14.2) with ESMTP id nA4HlOeu015848 for ; Wed, 4 Nov 2009 17:47:27 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932222AbZKDReU (ORCPT ); Wed, 4 Nov 2009 12:34:20 -0500 Received: (majordomo@vger.kernel.org) by vger.kernel.org id S932170AbZKDReS (ORCPT ); Wed, 4 Nov 2009 12:34:18 -0500 Received: from fg-out-1718.google.com ([72.14.220.158]:41096 "EHLO fg-out-1718.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932154AbZKDReQ (ORCPT ); Wed, 4 Nov 2009 12:34:16 -0500 Received: by fg-out-1718.google.com with SMTP id d23so1958951fga.1 for ; Wed, 04 Nov 2009 09:34:21 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=gamma; h=domainkey-signature:received:received:from:to:cc:date:message-id :in-reply-to:references:subject; bh=hKEhuP8AAxsYGZIyIgFejS7mPza66+p4LEg+6qTaBTI=; b=AnyVbi5qEVPYdcCGdwxsndzlKIClNV8YNpXqyFMBhRK1vLnt8mYdG46qleo/ufaKYR LokOcHCq37Td4B6pRAJJwIczllyC+L31U/2yp0gYfRdYc9fWl8sHDoBKwu6+E+mVLDYW az17hh9J+TZII7pofTMAFxmaoG4Us3aYHNR2g= DomainKey-Signature: a=rsa-sha1; c=nofws; d=gmail.com; s=gamma; h=from:to:cc:date:message-id:in-reply-to:references:subject; b=lvlp5qOy0H6XuDyZLYo6n+WlpK1h/2ji23CTvgIaMtPmwtiLZYabFwhWDGsLZo9EGo Z0N+X5bf2C2r0iy5FfpZ0cnXy9AXzQwOAeqbGQFT67EYvwAgOb/5mXg7zMY4RNaz7/h5 vCfXoRCScBVbAAQ6KPlxaQ8haJVpDnbVtD8lA= Received: by 10.86.235.29 with SMTP id i29mr4140546fgh.57.1257356060946; Wed, 04 Nov 2009 09:34:20 -0800 (PST) Received: from localhost.localdomain (chello089079027028.chello.pl [89.79.27.28]) by mx.google.com with ESMTPS id d4sm2220162fga.6.2009.11.04.09.34.19 (version=TLSv1/SSLv3 cipher=RC4-MD5); Wed, 04 Nov 2009 09:34:20 -0800 (PST) From: Bartlomiej Zolnierkiewicz To: linux-wireless@vger.kernel.org Cc: Gertjan van Wingerde , Bartlomiej Zolnierkiewicz , Ivo van Doorn , linux-kernel@vger.kernel.org, "John W. Linville" Date: Wed, 04 Nov 2009 18:33:57 +0100 Message-Id: <20091104173357.28463.50170.sendpatchset@localhost.localdomain> In-Reply-To: <20091104173151.28463.68742.sendpatchset@localhost.localdomain> References: <20091104173151.28463.68742.sendpatchset@localhost.localdomain> Subject: [PATCH 16/41] rt2800pci: add rt2800_bbp_[read,write]() wrappers Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Index: b/drivers/net/wireless/rt2x00/rt2800pci.c =================================================================== --- a/drivers/net/wireless/rt2x00/rt2800pci.c +++ b/drivers/net/wireless/rt2x00/rt2800pci.c @@ -135,6 +135,18 @@ static void rt2800pci_bbp_read(struct rt mutex_unlock(&rt2x00dev->csr_mutex); } +static inline void rt2800_bbp_write(struct rt2x00_dev *rt2x00dev, + const unsigned int word, const u8 value) +{ + rt2800pci_bbp_write(rt2x00dev, word, value); +} + +static inline void rt2800_bbp_read(struct rt2x00_dev *rt2x00dev, + const unsigned int word, u8 *value) +{ + rt2800pci_bbp_read(rt2x00dev, word, value); +} + static void rt2800pci_rfcsr_write(struct rt2x00_dev *rt2x00dev, const unsigned int word, const u8 value) { @@ -399,8 +411,8 @@ static const struct rt2x00debug rt2800pc .word_count = EEPROM_SIZE / sizeof(u16), }, .bbp = { - .read = rt2800pci_bbp_read, - .write = rt2800pci_bbp_write, + .read = rt2800_bbp_read, + .write = rt2800_bbp_write, .word_base = BBP_BASE, .word_size = sizeof(u8), .word_count = BBP_SIZE / sizeof(u8), @@ -766,8 +778,8 @@ static void rt2800pci_config_ant(struct u8 r1; u8 r3; - rt2800pci_bbp_read(rt2x00dev, 1, &r1); - rt2800pci_bbp_read(rt2x00dev, 3, &r3); + rt2800_bbp_read(rt2x00dev, 1, &r1); + rt2800_bbp_read(rt2x00dev, 3, &r3); /* * Configure the TX antenna. @@ -800,8 +812,8 @@ static void rt2800pci_config_ant(struct break; } - rt2800pci_bbp_write(rt2x00dev, 3, r3); - rt2800pci_bbp_write(rt2x00dev, 1, r1); + rt2800_bbp_write(rt2x00dev, 3, r3); + rt2800_bbp_write(rt2x00dev, 1, r1); } static void rt2800pci_config_lna_gain(struct rt2x00_dev *rt2x00dev, @@ -944,26 +956,26 @@ static void rt2800pci_config_channel(str /* * Change BBP settings */ - rt2800pci_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); - rt2800pci_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); - rt2800pci_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); - rt2800pci_bbp_write(rt2x00dev, 86, 0); + rt2800_bbp_write(rt2x00dev, 62, 0x37 - rt2x00dev->lna_gain); + rt2800_bbp_write(rt2x00dev, 63, 0x37 - rt2x00dev->lna_gain); + rt2800_bbp_write(rt2x00dev, 64, 0x37 - rt2x00dev->lna_gain); + rt2800_bbp_write(rt2x00dev, 86, 0); if (rf->channel <= 14) { if (test_bit(CONFIG_EXTERNAL_LNA_BG, &rt2x00dev->flags)) { - rt2800pci_bbp_write(rt2x00dev, 82, 0x62); - rt2800pci_bbp_write(rt2x00dev, 75, 0x46); + rt2800_bbp_write(rt2x00dev, 82, 0x62); + rt2800_bbp_write(rt2x00dev, 75, 0x46); } else { - rt2800pci_bbp_write(rt2x00dev, 82, 0x84); - rt2800pci_bbp_write(rt2x00dev, 75, 0x50); + rt2800_bbp_write(rt2x00dev, 82, 0x84); + rt2800_bbp_write(rt2x00dev, 75, 0x50); } } else { - rt2800pci_bbp_write(rt2x00dev, 82, 0xf2); + rt2800_bbp_write(rt2x00dev, 82, 0xf2); if (test_bit(CONFIG_EXTERNAL_LNA_A, &rt2x00dev->flags)) - rt2800pci_bbp_write(rt2x00dev, 75, 0x46); + rt2800_bbp_write(rt2x00dev, 75, 0x46); else - rt2800pci_bbp_write(rt2x00dev, 75, 0x50); + rt2800_bbp_write(rt2x00dev, 75, 0x50); } rt2800_register_read(rt2x00dev, TX_BAND_CFG, ®); @@ -995,23 +1007,23 @@ static void rt2800pci_config_channel(str rt2800_register_write(rt2x00dev, TX_PIN_CFG, tx_pin); - rt2800pci_bbp_read(rt2x00dev, 4, &bbp); + rt2800_bbp_read(rt2x00dev, 4, &bbp); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * conf_is_ht40(conf)); - rt2800pci_bbp_write(rt2x00dev, 4, bbp); + rt2800_bbp_write(rt2x00dev, 4, bbp); - rt2800pci_bbp_read(rt2x00dev, 3, &bbp); + rt2800_bbp_read(rt2x00dev, 3, &bbp); rt2x00_set_field8(&bbp, BBP3_HT40_PLUS, conf_is_ht40_plus(conf)); - rt2800pci_bbp_write(rt2x00dev, 3, bbp); + rt2800_bbp_write(rt2x00dev, 3, bbp); if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { if (conf_is_ht40(conf)) { - rt2800pci_bbp_write(rt2x00dev, 69, 0x1a); - rt2800pci_bbp_write(rt2x00dev, 70, 0x0a); - rt2800pci_bbp_write(rt2x00dev, 73, 0x16); + rt2800_bbp_write(rt2x00dev, 69, 0x1a); + rt2800_bbp_write(rt2x00dev, 70, 0x0a); + rt2800_bbp_write(rt2x00dev, 73, 0x16); } else { - rt2800pci_bbp_write(rt2x00dev, 69, 0x16); - rt2800pci_bbp_write(rt2x00dev, 70, 0x08); - rt2800pci_bbp_write(rt2x00dev, 73, 0x11); + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 70, 0x08); + rt2800_bbp_write(rt2x00dev, 73, 0x11); } } @@ -1025,9 +1037,9 @@ static void rt2800pci_config_txpower(str u32 value = TXPOWER_G_TO_DEV(txpower); u8 r1; - rt2800pci_bbp_read(rt2x00dev, 1, &r1); + rt2800_bbp_read(rt2x00dev, 1, &r1); rt2x00_set_field8(®, BBP1_TX_POWER, 0); - rt2800pci_bbp_write(rt2x00dev, 1, r1); + rt2800_bbp_write(rt2x00dev, 1, r1); rt2800_register_read(rt2x00dev, TX_PWR_CFG_0, ®); rt2x00_set_field32(®, TX_PWR_CFG_0_1MBS, value); @@ -1176,7 +1188,7 @@ static inline void rt2800pci_set_vgc(str struct link_qual *qual, u8 vgc_level) { if (qual->vgc_level != vgc_level) { - rt2800pci_bbp_write(rt2x00dev, 66, vgc_level); + rt2800_bbp_write(rt2x00dev, 66, vgc_level); qual->vgc_level = vgc_level; qual->vgc_level_reg = vgc_level; } @@ -1720,7 +1732,7 @@ static int rt2800pci_wait_bbp_ready(stru msleep(1); for (i = 0; i < REGISTER_BUSY_COUNT; i++) { - rt2800pci_bbp_read(rt2x00dev, 0, &value); + rt2800_bbp_read(rt2x00dev, 0, &value); if ((value != 0xff) && (value != 0x00)) return 0; udelay(REGISTER_BUSY_DELAY); @@ -1741,33 +1753,33 @@ static int rt2800pci_init_bbp(struct rt2 rt2800pci_wait_bbp_ready(rt2x00dev))) return -EACCES; - rt2800pci_bbp_write(rt2x00dev, 65, 0x2c); - rt2800pci_bbp_write(rt2x00dev, 66, 0x38); - rt2800pci_bbp_write(rt2x00dev, 69, 0x12); - rt2800pci_bbp_write(rt2x00dev, 70, 0x0a); - rt2800pci_bbp_write(rt2x00dev, 73, 0x10); - rt2800pci_bbp_write(rt2x00dev, 81, 0x37); - rt2800pci_bbp_write(rt2x00dev, 82, 0x62); - rt2800pci_bbp_write(rt2x00dev, 83, 0x6a); - rt2800pci_bbp_write(rt2x00dev, 84, 0x99); - rt2800pci_bbp_write(rt2x00dev, 86, 0x00); - rt2800pci_bbp_write(rt2x00dev, 91, 0x04); - rt2800pci_bbp_write(rt2x00dev, 92, 0x00); - rt2800pci_bbp_write(rt2x00dev, 103, 0x00); - rt2800pci_bbp_write(rt2x00dev, 105, 0x05); + rt2800_bbp_write(rt2x00dev, 65, 0x2c); + rt2800_bbp_write(rt2x00dev, 66, 0x38); + rt2800_bbp_write(rt2x00dev, 69, 0x12); + rt2800_bbp_write(rt2x00dev, 70, 0x0a); + rt2800_bbp_write(rt2x00dev, 73, 0x10); + rt2800_bbp_write(rt2x00dev, 81, 0x37); + rt2800_bbp_write(rt2x00dev, 82, 0x62); + rt2800_bbp_write(rt2x00dev, 83, 0x6a); + rt2800_bbp_write(rt2x00dev, 84, 0x99); + rt2800_bbp_write(rt2x00dev, 86, 0x00); + rt2800_bbp_write(rt2x00dev, 91, 0x04); + rt2800_bbp_write(rt2x00dev, 92, 0x00); + rt2800_bbp_write(rt2x00dev, 103, 0x00); + rt2800_bbp_write(rt2x00dev, 105, 0x05); if (rt2x00_rev(&rt2x00dev->chip) == RT2860C_VERSION) { - rt2800pci_bbp_write(rt2x00dev, 69, 0x16); - rt2800pci_bbp_write(rt2x00dev, 73, 0x12); + rt2800_bbp_write(rt2x00dev, 69, 0x16); + rt2800_bbp_write(rt2x00dev, 73, 0x12); } if (rt2x00_rev(&rt2x00dev->chip) > RT2860D_VERSION) - rt2800pci_bbp_write(rt2x00dev, 84, 0x19); + rt2800_bbp_write(rt2x00dev, 84, 0x19); if (rt2x00_rt(&rt2x00dev->chip, RT3052)) { - rt2800pci_bbp_write(rt2x00dev, 31, 0x08); - rt2800pci_bbp_write(rt2x00dev, 78, 0x0e); - rt2800pci_bbp_write(rt2x00dev, 80, 0x08); + rt2800_bbp_write(rt2x00dev, 31, 0x08); + rt2800_bbp_write(rt2x00dev, 78, 0x0e); + rt2800_bbp_write(rt2x00dev, 80, 0x08); } for (i = 0; i < EEPROM_BBP_SIZE; i++) { @@ -1776,7 +1788,7 @@ static int rt2800pci_init_bbp(struct rt2 if (eeprom != 0xffff && eeprom != 0x0000) { reg_id = rt2x00_get_field16(eeprom, EEPROM_BBP_REG_ID); value = rt2x00_get_field16(eeprom, EEPROM_BBP_VALUE); - rt2800pci_bbp_write(rt2x00dev, reg_id, value); + rt2800_bbp_write(rt2x00dev, reg_id, value); } } @@ -1795,9 +1807,9 @@ static u8 rt2800pci_init_rx_filter(struc rt2800pci_rfcsr_write(rt2x00dev, 24, rfcsr24); - rt2800pci_bbp_read(rt2x00dev, 4, &bbp); + rt2800_bbp_read(rt2x00dev, 4, &bbp); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 2 * bw40); - rt2800pci_bbp_write(rt2x00dev, 4, bbp); + rt2800_bbp_write(rt2x00dev, 4, bbp); rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr); rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 1); @@ -1806,13 +1818,13 @@ static u8 rt2800pci_init_rx_filter(struc /* * Set power & frequency of passband test tone */ - rt2800pci_bbp_write(rt2x00dev, 24, 0); + rt2800_bbp_write(rt2x00dev, 24, 0); for (i = 0; i < 100; i++) { - rt2800pci_bbp_write(rt2x00dev, 25, 0x90); + rt2800_bbp_write(rt2x00dev, 25, 0x90); msleep(1); - rt2800pci_bbp_read(rt2x00dev, 55, &passband); + rt2800_bbp_read(rt2x00dev, 55, &passband); if (passband) break; } @@ -1820,13 +1832,13 @@ static u8 rt2800pci_init_rx_filter(struc /* * Set power & frequency of stopband test tone */ - rt2800pci_bbp_write(rt2x00dev, 24, 0x06); + rt2800_bbp_write(rt2x00dev, 24, 0x06); for (i = 0; i < 100; i++) { - rt2800pci_bbp_write(rt2x00dev, 25, 0x90); + rt2800_bbp_write(rt2x00dev, 25, 0x90); msleep(1); - rt2800pci_bbp_read(rt2x00dev, 55, &stopband); + rt2800_bbp_read(rt2x00dev, 55, &stopband); if ((passband - stopband) <= filter_target) { rfcsr24++; @@ -1905,7 +1917,7 @@ static int rt2800pci_init_rfcsr(struct r /* * Set back to initial state */ - rt2800pci_bbp_write(rt2x00dev, 24, 0); + rt2800_bbp_write(rt2x00dev, 24, 0); rt2800pci_rfcsr_read(rt2x00dev, 22, &rfcsr); rt2x00_set_field8(&rfcsr, RFCSR22_BASEBAND_LOOPBACK, 0); @@ -1914,9 +1926,9 @@ static int rt2800pci_init_rfcsr(struct r /* * set BBP back to BW20 */ - rt2800pci_bbp_read(rt2x00dev, 4, &bbp); + rt2800_bbp_read(rt2x00dev, 4, &bbp); rt2x00_set_field8(&bbp, BBP4_BANDWIDTH, 0); - rt2800pci_bbp_write(rt2x00dev, 4, bbp); + rt2800_bbp_write(rt2x00dev, 4, bbp); return 0; }