From patchwork Thu Oct 22 02:28:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shayne Chen X-Patchwork-Id: 11850133 X-Patchwork-Delegate: nbd@nbd.name Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 85E6A16C0 for ; Thu, 22 Oct 2020 02:28:47 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 5ED0922249 for ; Thu, 22 Oct 2020 02:28:47 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="jz24tWuQ" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2895047AbgJVC2q (ORCPT ); Wed, 21 Oct 2020 22:28:46 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:53853 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2895045AbgJVC2q (ORCPT ); Wed, 21 Oct 2020 22:28:46 -0400 X-UUID: f80af63315d1490b9343b2a9f0e4d030-20201022 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=Xc9AEzvVsB14dXFTxBdxWUYms3Pt4khR3WyeScYHvVw=; b=jz24tWuQhDkfvxMkjhqrvDRVk+1SXz3k2e24z76TUGQj5AWAEwz85Twdi17XHwJDoRlmhJuuJLVA67uJUr/TC0K6BDatEy8qvsXjR9lFFuQMVDKiGHAtlOlk+Rv5THi1uFYtpAxP44FKxuc+O0bO0QAkKIfda9M42r1GWfafDts=; X-UUID: f80af63315d1490b9343b2a9f0e4d030-20201022 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 1957443281; Thu, 22 Oct 2020 10:28:41 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n2.mediatek.inc (172.21.101.56) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Oct 2020 10:28:40 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Oct 2020 10:28:40 +0800 From: Shayne Chen To: Felix Fietkau CC: linux-wireless , Lorenzo Bianconi , Ryder Lee , Evelyn Tsai , linux-mediatek , Shayne Chen Subject: [PATCH v4 10/10] mt76: mt7915: add support to set tx frequency offset in testmode Date: Thu, 22 Oct 2020 10:28:20 +0800 Message-ID: <20201022022820.3077-10-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201022022820.3077-1-shayne.chen@mediatek.com> References: <20201022022820.3077-1-shayne.chen@mediatek.com> MIME-Version: 1.0 X-TM-SNTS-SMTP: CB4A3D2A80CB3F71F154246CEE489732BE5F3B5B1E04D93793DBBDF147D4C7B02000:8 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Support to set tx frequency offset in testmode, which is usally used in the pre-calibration stage. Reviewed-by: Ryder Lee Signed-off-by: Shayne Chen --- .../net/wireless/mediatek/mt76/mt7915/mcu.h | 1 + .../wireless/mediatek/mt76/mt7915/testmode.c | 20 +++++++++++++++++++ .../wireless/mediatek/mt76/mt7915/testmode.h | 6 ++++++ 3 files changed, 27 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h index 0a7e9d2..ff5ed09 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/mcu.h @@ -48,6 +48,7 @@ enum { enum { MCU_ATE_SET_TRX = 0x1, + MCU_ATE_SET_FREQ_OFFSET = 0xa, }; struct mt7915_mcu_rxd { diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c index b3649bc..9ee82e2 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.c @@ -8,6 +8,7 @@ enum { TM_CHANGED_TXPOWER, + TM_CHANGED_FREQ_OFFSET, /* must be last */ NUM_TM_CHANGED @@ -15,6 +16,7 @@ enum { static const u8 tm_change_map[] = { [TM_CHANGED_TXPOWER] = MT76_TM_ATTR_TX_POWER, + [TM_CHANGED_FREQ_OFFSET] = MT76_TM_ATTR_FREQ_OFFSET, }; struct reg_band { @@ -82,6 +84,19 @@ mt7915_tm_set_tx_power(struct mt7915_phy *phy) return ret; } +static int +mt7915_tm_set_freq_offset(struct mt7915_dev *dev, bool en, u32 val) +{ + struct mt7915_tm_cmd req = { + .testmode_en = en, + .param_idx = MCU_ATE_SET_FREQ_OFFSET, + .param.freq.freq_offset = cpu_to_le32(val), + }; + + return mt76_mcu_send_msg(&dev->mt76, MCU_EXT_CMD_ATE_CTRL, &req, + sizeof(req), false); +} + static int mt7915_tm_mode_ctrl(struct mt7915_dev *dev, bool enable) { @@ -226,6 +241,11 @@ mt7915_tm_set_rx_frames(struct mt7915_dev *dev, bool en) static void mt7915_tm_update_params(struct mt7915_dev *dev, u32 changed) { + struct mt76_testmode_data *td = &dev->mt76.test; + bool en = dev->mt76.test.state != MT76_TM_STATE_OFF; + + if (changed & BIT(TM_CHANGED_FREQ_OFFSET)) + mt7915_tm_set_freq_offset(dev, en, en ? td->freq_offset : 0); if (changed & BIT(TM_CHANGED_TXPOWER)) mt7915_tm_set_tx_power(&dev->phy); } diff --git a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h index 04f4a2c..964f2d7 100644 --- a/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h +++ b/drivers/net/wireless/mediatek/mt76/mt7915/testmode.h @@ -11,6 +11,11 @@ struct mt7915_tm_trx { u8 rsv; }; +struct mt7915_tm_freq_offset { + u8 band; + __le32 freq_offset; +}; + struct mt7915_tm_cmd { u8 testmode_en; u8 param_idx; @@ -18,6 +23,7 @@ struct mt7915_tm_cmd { union { __le32 data; struct mt7915_tm_trx trx; + struct mt7915_tm_freq_offset freq; u8 test[72]; } param; } __packed;