From patchwork Thu Oct 22 02:28:13 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Shayne Chen X-Patchwork-Id: 11850129 X-Patchwork-Delegate: nbd@nbd.name Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DA61D16C0 for ; Thu, 22 Oct 2020 02:28:45 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id AFBD72227F for ; Thu, 22 Oct 2020 02:28:45 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=mediatek.com header.i=@mediatek.com header.b="d8kUFBpK" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S2895041AbgJVC2p (ORCPT ); Wed, 21 Oct 2020 22:28:45 -0400 Received: from mailgw01.mediatek.com ([210.61.82.183]:53853 "EHLO mailgw01.mediatek.com" rhost-flags-OK-FAIL-OK-FAIL) by vger.kernel.org with ESMTP id S2443052AbgJVC2o (ORCPT ); Wed, 21 Oct 2020 22:28:44 -0400 X-UUID: 0e09e7288fc6478bba2a28920fa84e4a-20201022 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=mediatek.com; s=dk; h=Content-Transfer-Encoding:Content-Type:MIME-Version:References:In-Reply-To:Message-ID:Date:Subject:CC:To:From; bh=IV3VKhX62l8SB/s3LSR95ku9WRinPqcgkb7E4fEt4ck=; b=d8kUFBpKi024KDCa1am18as/Z5zYseQVR6vZLOqr4xWpJNse2ZwJi7a/Femo1O5H8J1oRcV+OwsYoP+HnHz0FGebo8uNrUXlctxVZSUV1adrdqgegIDtpaRdeGLGjXg/23kIxUuI2E4gd9YSC8vzNlsBvjR37h7OlA/CWGJiRg0=; X-UUID: 0e09e7288fc6478bba2a28920fa84e4a-20201022 Received: from mtkcas10.mediatek.inc [(172.21.101.39)] by mailgw01.mediatek.com (envelope-from ) (Cellopoint E-mail Firewall v4.1.14 Build 0819 with TLSv1.2 ECDHE-RSA-AES256-SHA384 256/256) with ESMTP id 404427282; Thu, 22 Oct 2020 10:28:39 +0800 Received: from mtkcas08.mediatek.inc (172.21.101.126) by mtkmbs08n1.mediatek.inc (172.21.101.55) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 22 Oct 2020 10:28:38 +0800 Received: from mtksdccf07.mediatek.inc (172.21.84.99) by mtkcas08.mediatek.inc (172.21.101.73) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 22 Oct 2020 10:28:38 +0800 From: Shayne Chen To: Felix Fietkau CC: linux-wireless , Lorenzo Bianconi , Ryder Lee , Evelyn Tsai , linux-mediatek , Shayne Chen Subject: [PATCH v4 03/10] mt76: testmode: add tx_rate_stbc parameter Date: Thu, 22 Oct 2020 10:28:13 +0800 Message-ID: <20201022022820.3077-3-shayne.chen@mediatek.com> X-Mailer: git-send-email 2.18.0 In-Reply-To: <20201022022820.3077-1-shayne.chen@mediatek.com> References: <20201022022820.3077-1-shayne.chen@mediatek.com> MIME-Version: 1.0 X-MTK: N Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org Add the parameter to control STBC function in testmode. Reviewed-by: Ryder Lee Signed-off-by: Shayne Chen --- drivers/net/wireless/mediatek/mt76/mt76.h | 1 + drivers/net/wireless/mediatek/mt76/testmode.c | 6 ++++++ drivers/net/wireless/mediatek/mt76/testmode.h | 2 ++ 3 files changed, 9 insertions(+) diff --git a/drivers/net/wireless/mediatek/mt76/mt76.h b/drivers/net/wireless/mediatek/mt76/mt76.h index 009d20a..9ff249e 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76.h +++ b/drivers/net/wireless/mediatek/mt76/mt76.h @@ -527,6 +527,7 @@ struct mt76_testmode_data { u8 tx_rate_nss; u8 tx_rate_sgi; u8 tx_rate_ldpc; + u8 tx_rate_stbc; u8 tx_antenna_mask; diff --git a/drivers/net/wireless/mediatek/mt76/testmode.c b/drivers/net/wireless/mediatek/mt76/testmode.c index 883f59c..6b59e08 100644 --- a/drivers/net/wireless/mediatek/mt76/testmode.c +++ b/drivers/net/wireless/mediatek/mt76/testmode.c @@ -11,6 +11,7 @@ static const struct nla_policy mt76_tm_policy[NUM_MT76_TM_ATTRS] = { [MT76_TM_ATTR_TX_RATE_IDX] = { .type = NLA_U8 }, [MT76_TM_ATTR_TX_RATE_SGI] = { .type = NLA_U8 }, [MT76_TM_ATTR_TX_RATE_LDPC] = { .type = NLA_U8 }, + [MT76_TM_ATTR_TX_RATE_STBC] = { .type = NLA_U8 }, [MT76_TM_ATTR_TX_ANTENNA] = { .type = NLA_U8 }, [MT76_TM_ATTR_TX_POWER_CONTROL] = { .type = NLA_U8 }, [MT76_TM_ATTR_TX_POWER] = { .type = NLA_NESTED }, @@ -131,6 +132,9 @@ mt76_testmode_tx_init(struct mt76_dev *dev) if (td->tx_rate_ldpc) info->flags |= IEEE80211_TX_CTL_LDPC; + if (td->tx_rate_stbc) + info->flags |= IEEE80211_TX_CTL_STBC; + if (td->tx_rate_mode >= MT76_TM_TX_MODE_HT) { switch (dev->phy.chandef.width) { case NL80211_CHAN_WIDTH_40: @@ -336,6 +340,7 @@ int mt76_testmode_cmd(struct ieee80211_hw *hw, struct ieee80211_vif *vif, 1, hweight8(phy->antenna_mask)) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_SGI], &td->tx_rate_sgi, 0, 1) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_LDPC], &td->tx_rate_ldpc, 0, 1) || + mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_RATE_STBC], &td->tx_rate_stbc, 0, 1) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_ANTENNA], &td->tx_antenna_mask, 1, phy->antenna_mask) || mt76_tm_get_u8(tb[MT76_TM_ATTR_TX_POWER_CONTROL], @@ -472,6 +477,7 @@ int mt76_testmode_dump(struct ieee80211_hw *hw, struct sk_buff *msg, nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_IDX, td->tx_rate_idx) || nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_SGI, td->tx_rate_sgi) || nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_LDPC, td->tx_rate_ldpc) || + nla_put_u8(msg, MT76_TM_ATTR_TX_RATE_STBC, td->tx_rate_stbc) || (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_ANTENNA) && nla_put_u8(msg, MT76_TM_ATTR_TX_ANTENNA, td->tx_antenna_mask)) || (mt76_testmode_param_present(td, MT76_TM_ATTR_TX_POWER_CONTROL) && diff --git a/drivers/net/wireless/mediatek/mt76/testmode.h b/drivers/net/wireless/mediatek/mt76/testmode.h index 4d22627..00c1659 100644 --- a/drivers/net/wireless/mediatek/mt76/testmode.h +++ b/drivers/net/wireless/mediatek/mt76/testmode.h @@ -25,6 +25,7 @@ * @MT76_TM_ATTR_TX_RATE_IDX: packet tx rate/MCS index (u8) * @MT76_TM_ATTR_TX_RATE_SGI: packet tx use short guard interval (u8) * @MT76_TM_ATTR_TX_RATE_LDPC: packet tx enable LDPC (u8) + * @MT76_TM_ATTR_TX_RATE_STBC: packet tx enable STBC (u8) * * @MT76_TM_ATTR_TX_ANTENNA: tx antenna mask (u8) * @MT76_TM_ATTR_TX_POWER_CONTROL: enable tx power control (u8) @@ -50,6 +51,7 @@ enum mt76_testmode_attr { MT76_TM_ATTR_TX_RATE_IDX, MT76_TM_ATTR_TX_RATE_SGI, MT76_TM_ATTR_TX_RATE_LDPC, + MT76_TM_ATTR_TX_RATE_STBC, MT76_TM_ATTR_TX_ANTENNA, MT76_TM_ATTR_TX_POWER_CONTROL,