From patchwork Tue Jul 31 08:09:07 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Lorenzo Bianconi X-Patchwork-Id: 10550383 X-Patchwork-Delegate: kvalo@adurom.com Return-Path: Received: from mail.wl.linuxfoundation.org (pdx-wl-mail.web.codeaurora.org [172.30.200.125]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 8E04D15E2 for ; Tue, 31 Jul 2018 08:09:33 +0000 (UTC) Received: from mail.wl.linuxfoundation.org (localhost [127.0.0.1]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 80AA12A20E for ; Tue, 31 Jul 2018 08:09:33 +0000 (UTC) Received: by mail.wl.linuxfoundation.org (Postfix, from userid 486) id 7568D2A38B; Tue, 31 Jul 2018 08:09:33 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on pdx-wl-mail.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-7.9 required=2.0 tests=BAYES_00,MAILING_LIST_MULTI, RCVD_IN_DNSWL_HI autolearn=ham version=3.3.1 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.wl.linuxfoundation.org (Postfix) with ESMTP id 1C9D92A20E for ; Tue, 31 Jul 2018 08:09:33 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1730167AbeGaJsj (ORCPT ); Tue, 31 Jul 2018 05:48:39 -0400 Received: from mail-wr1-f67.google.com ([209.85.221.67]:43808 "EHLO mail-wr1-f67.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1729224AbeGaJsj (ORCPT ); Tue, 31 Jul 2018 05:48:39 -0400 Received: by mail-wr1-f67.google.com with SMTP id b15-v6so15598616wrv.10 for ; Tue, 31 Jul 2018 01:09:30 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=5qzGFr59sYOd10KYCYsWPpcosZRrQQ+jwGLIa6Qz8NY=; b=D9KdBGEGWRQh81xf6+KIh1hDElKFwSO7nqNaJFVeUF0Z+fFM5XWMICQnmn0ocw0Mv0 ZTjhEf68RQyAKdB8aZS/3R4ElopFp9tRQIl1+r46G8cayIe37EHyc1V8Tba4nOb8a2RU oy4UYsv25atPpIkSIjp5nt8pqZOgYZfDM2HDweje+Onz4+ssneXfVGO0ObPMOJXSwcsd HC0+l2hYjtMfJ9vSD5t96WU6IEGHZM8jaLQ+4Np+88CoPr0D8rrJBDug5UOMHWR0DJ5a pEMPkEbCAmLw/5FhZw0eurl11RCjcUH8UhG2UOb+UV70GTRxMx7VK+3ncInQ43X+N1G9 c8tA== X-Gm-Message-State: AOUpUlEBKRDgUczdNtV/AM58AKvD3ZKj5Z9tvgNnp50NVWmL5Y91Rl5L cA1XtoxOAeC3oKy3nwzTvnVNcQ== X-Google-Smtp-Source: AAOMgpcEdPFg8tcQYNw0V4ZXd4X7zcddNnK0DmrH5LsBz1svlXNmUD7iHpN0GJma3zn135d8g+dlAQ== X-Received: by 2002:adf:9996:: with SMTP id y22-v6mr21072694wrb.69.1533024570215; Tue, 31 Jul 2018 01:09:30 -0700 (PDT) Received: from localhost.localdomain.com (nat-pool-mxp-t.redhat.com. [149.6.153.186]) by smtp.gmail.com with ESMTPSA id o4-v6sm1501051wmo.20.2018.07.31.01.09.29 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Tue, 31 Jul 2018 01:09:29 -0700 (PDT) From: Lorenzo Bianconi To: nbd@nbd.name Cc: linux-wireless@vger.kernel.org, sgruszka@redhat.com Subject: [PATCH v2 06/19] mt76x2: introduce mt76x2_mac_load_tx_status routine Date: Tue, 31 Jul 2018 10:09:07 +0200 Message-Id: <51b6f31569c15c6354051d79f16d5423ce0ecc8e.1533023328.git.lorenzo.bianconi@redhat.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: References: Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Virus-Scanned: ClamAV using ClamSMTP Add mt76x2_mac_load_tx_status routine since tx stats register map is shared between usb and pci based devices but usb devices do not have a tx stat irq line as pcie ones and it is necessary to load tx statistics using a workqueue Signed-off-by: Lorenzo Bianconi --- .../net/wireless/mediatek/mt76/mt76x2_mac.c | 47 ++++++++++++------- 1 file changed, 30 insertions(+), 17 deletions(-) diff --git a/drivers/net/wireless/mediatek/mt76/mt76x2_mac.c b/drivers/net/wireless/mediatek/mt76/mt76x2_mac.c index e5e92f79f28a..bff0b7268467 100644 --- a/drivers/net/wireless/mediatek/mt76/mt76x2_mac.c +++ b/drivers/net/wireless/mediatek/mt76/mt76x2_mac.c @@ -532,11 +532,37 @@ mt76x2_send_tx_status(struct mt76x2_dev *dev, struct mt76x2_tx_status *stat, rcu_read_unlock(); } +static bool +mt76x2_mac_load_tx_status(struct mt76x2_dev *dev, + struct mt76x2_tx_status *stat) +{ + u32 stat1, stat2; + + stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT); + stat1 = mt76_rr(dev, MT_TX_STAT_FIFO); + + stat->valid = !!(stat1 & MT_TX_STAT_FIFO_VALID); + if (!stat->valid) + return false; + + stat->success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS); + stat->aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR); + stat->ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ); + stat->wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1); + stat->rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1); + + stat->retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2); + stat->pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2); + + return true; +} + void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq) { struct mt76x2_tx_status stat = {}; unsigned long flags; u8 update = 1; + bool ret; if (!test_bit(MT76_STATE_RUNNING, &dev->mt76.state)) return; @@ -544,26 +570,13 @@ void mt76x2_mac_poll_tx_status(struct mt76x2_dev *dev, bool irq) trace_mac_txstat_poll(dev); while (!irq || !kfifo_is_full(&dev->txstatus_fifo)) { - u32 stat1, stat2; - spin_lock_irqsave(&dev->irq_lock, flags); - stat2 = mt76_rr(dev, MT_TX_STAT_FIFO_EXT); - stat1 = mt76_rr(dev, MT_TX_STAT_FIFO); - if (!(stat1 & MT_TX_STAT_FIFO_VALID)) { - spin_unlock_irqrestore(&dev->irq_lock, flags); - break; - } - + ret = mt76x2_mac_load_tx_status(dev, &stat); spin_unlock_irqrestore(&dev->irq_lock, flags); - stat.valid = 1; - stat.success = !!(stat1 & MT_TX_STAT_FIFO_SUCCESS); - stat.aggr = !!(stat1 & MT_TX_STAT_FIFO_AGGR); - stat.ack_req = !!(stat1 & MT_TX_STAT_FIFO_ACKREQ); - stat.wcid = FIELD_GET(MT_TX_STAT_FIFO_WCID, stat1); - stat.rate = FIELD_GET(MT_TX_STAT_FIFO_RATE, stat1); - stat.retry = FIELD_GET(MT_TX_STAT_FIFO_EXT_RETRY, stat2); - stat.pktid = FIELD_GET(MT_TX_STAT_FIFO_EXT_PKTID, stat2); + if (!ret) + break; + trace_mac_txstat_fetch(dev, &stat); if (!irq) {