From patchwork Fri Dec 3 03:12:38 2010 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Joe Perches X-Patchwork-Id: 376531 Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by demeter1.kernel.org (8.14.4/8.14.3) with ESMTP id oB33EbS3017870 for ; Fri, 3 Dec 2010 03:14:38 GMT Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S932419Ab0LCDNk (ORCPT ); Thu, 2 Dec 2010 22:13:40 -0500 Received: from mail.perches.com ([173.55.12.10]:2182 "EHLO mail.perches.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S932426Ab0LCDNg (ORCPT ); Thu, 2 Dec 2010 22:13:36 -0500 Received: from Joe-Laptop.home (unknown [192.168.1.162]) by mail.perches.com (Postfix) with ESMTP id 214932436D; Thu, 2 Dec 2010 19:13:28 -0800 (PST) From: Joe Perches To: "Luis R. Rodriguez" , Jouni Malinen , Vasanthakumar Thiagarajan , Senthil Balasubramanian Cc: Peter Stuge , Felix Fietkau , "John W. Linville" , linux-wireless@vger.kernel.org, ath9k-devel@venema.h4ckr.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org Subject: [PATCH 4/4] ath: Fix ath_dbg access beyond array bound Date: Thu, 2 Dec 2010 19:12:38 -0800 Message-Id: X-Mailer: git-send-email 1.7.3.2.245.g03276.dirty In-Reply-To: <20101202190239.GE7399@tux> References: <20101202190239.GE7399@tux> In-Reply-To: References: Sender: linux-wireless-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-wireless@vger.kernel.org X-Greylist: IP, sender and recipient auto-whitelisted, not delayed by milter-greylist-4.2.3 (demeter1.kernel.org [140.211.167.41]); Fri, 03 Dec 2010 03:14:38 +0000 (UTC) diff --git a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c index 7b13a2e..34d1d7a 100644 --- a/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c +++ b/drivers/net/wireless/ath/ath9k/ar9003_eeprom.c @@ -4086,22 +4086,9 @@ static void ar9003_hw_set_target_power_eeprom(struct ath_hw *ah, u16 freq, ar9003_hw_eeprom_get_ht40_tgt_pwr(ah, HT_TARGET_RATE_23, freq, is2GHz) + ht40PowerIncForPdadc; - while (i < ar9300RateSize) { - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - + for (i = 0; i < ar9300RateSize; i++) { ath_dbg(common, ATH_DBG_EEPROM, "TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]); - i++; } } @@ -4689,17 +4676,7 @@ static void ath9k_hw_ar9300_set_txpower(struct ath_hw *ah, for (i = 0; i < ar9300RateSize; i++) { ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x ", i, targetPowerValT2[i]); - i++; - ath_dbg(common, ATH_DBG_EEPROM, - "TPC[%02d] 0x%08x\n\n", i, targetPowerValT2[i]); - i++; + "TPC[%02d] 0x%08x\n", i, targetPowerValT2[i]); } /*