From patchwork Wed Nov 20 03:21:25 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Simon Horman X-Patchwork-Id: 3209341 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 7722D9F3A0 for ; Wed, 20 Nov 2013 05:30:50 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 6B952206CD for ; Wed, 20 Nov 2013 05:30:49 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) by mail.kernel.org (Postfix) with ESMTP id 6A969206C7 for ; Wed, 20 Nov 2013 05:30:48 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [IPv6:::1]) by mail.linuxfoundation.org (Postfix) with ESMTP id A80921173; Wed, 20 Nov 2013 05:29:05 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTP id 3D8BC1021 for ; Wed, 20 Nov 2013 05:28:29 +0000 (UTC) X-Greylist: from auto-whitelisted by SQLgrey-1.7.6 Received: from kirsty.vergenet.net (kirsty.vergenet.net [202.4.237.240]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 2B17E210BE for ; Wed, 20 Nov 2013 05:28:26 +0000 (UTC) Received: from ayumi.isobedori.kobe.vergenet.net (p2020-ipbfp1604kobeminato.hyogo.ocn.ne.jp [114.154.85.20]) by kirsty.vergenet.net (Postfix) with ESMTP id D21AC2673B8; Wed, 20 Nov 2013 14:23:22 +1100 (EST) Received: by ayumi.isobedori.kobe.vergenet.net (Postfix, from userid 7100) id 6856C6CE6BA; Wed, 20 Nov 2013 12:23:21 +0900 (JST) From: Simon Horman To: ltsi-dev@lists.linuxfoundation.org Date: Wed, 20 Nov 2013 12:21:25 +0900 Message-Id: <1384917713-15962-568-git-send-email-horms+renesas@verge.net.au> X-Mailer: git-send-email 1.8.4 In-Reply-To: <1384917713-15962-1-git-send-email-horms+renesas@verge.net.au> References: <1384917713-15962-1-git-send-email-horms+renesas@verge.net.au> X-Spam-Status: No, score=-2.4 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY,UPPERCASE_50_75 autolearn=no version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org Cc: Magnus Damm Subject: [LTSI-dev] [PATCH ltsi-3.10 567/595] sh-pfc: r8a7790: Fix miscellaneous pinmux configuration tables mistakes X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org X-Virus-Scanned: ClamAV using ClamSMTP From: Shinya Kuribayashi Fix erroneous entries in the pinmux configuration tables that affect HSCIF, I2C, LBSC, SCIF, SSI and VIN operation. Signed-off-by: Shinya Kuribayashi Signed-off-by: Laurent Pinchart (cherry picked from commit 0a664e3d7978f54af72277a969245ac5e6418cd9) Signed-off-by: Simon Horman --- drivers/pinctrl/sh-pfc/pfc-r8a7790.c | 31 +++++++++++++++---------------- 1 file changed, 15 insertions(+), 16 deletions(-) diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c index 344be5e..93d4f78 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c @@ -877,7 +877,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI0_HSYNC_N_B, SEL_VI0_1), PINMUX_IPSR_MODSEL_DATA(IP1_14_12, VI2_DATA4_VI2_B4, SEL_VI2_0), PINMUX_IPSR_DATA(IP1_17_15, D13), - PINMUX_IPSR_MODSEL_DATA(IP1_17_15, AVB_TXD5, SEL_SCIFA1_2), + PINMUX_IPSR_DATA(IP1_17_15, AVB_TXD5), PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N, SEL_VI0_0), PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI0_VSYNC_N_B, SEL_VI0_1), PINMUX_IPSR_MODSEL_DATA(IP1_17_15, VI2_DATA5_VI2_B5, SEL_VI2_0), @@ -948,14 +948,14 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0, SEL_VI1_0), PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI1_R0_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_3_0, VI2_G0), - PINMUX_IPSR_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B), + PINMUX_IPSR_MODSEL_DATA(IP3_3_0, VI2_DATA3_VI2_B3_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_7_4, A12), PINMUX_IPSR_MODSEL_DATA(IP3_7_4, SCIFB2_RXD_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_7_4, MSIOF2_TXD), PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1, SEL_VI1_0), PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI1_R1_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_7_4, VI2_G1), - PINMUX_IPSR_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B), + PINMUX_IPSR_MODSEL_DATA(IP3_7_4, VI2_DATA4_VI2_B4_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_11_8, A13), PINMUX_IPSR_MODSEL_DATA(IP3_11_8, SCIFB2_RTS_N_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_11_8, EX_WAIT2), @@ -963,7 +963,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2, SEL_VI1_0), PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI1_R2_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP3_11_8, VI2_G2), - PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_0), + PINMUX_IPSR_MODSEL_DATA(IP3_11_8, VI2_DATA5_VI2_B5_B, SEL_VI2_1), PINMUX_IPSR_DATA(IP3_14_12, A14), PINMUX_IPSR_MODSEL_DATA(IP3_14_12, SCIFB2_TXD_B, SEL_SCIFB2_1), PINMUX_IPSR_DATA(IP3_14_12, ATACS11_N), @@ -1055,7 +1055,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1, SEL_VI1_0), PINMUX_IPSR_MODSEL_DATA(IP5_2_0, VI1_G1_B, SEL_VI1_1), PINMUX_IPSR_DATA(IP5_2_0, VI2_R3), - PINMUX_IPSR_MODSEL_DATA(IP5_5_3, EX_CS4_N, SEL_I2C1_0), + PINMUX_IPSR_DATA(IP5_5_3, EX_CS4_N), PINMUX_IPSR_MODSEL_DATA(IP5_5_3, MSIOF1_SCK_B, SEL_SOF1_1), PINMUX_IPSR_DATA(IP5_5_3, VI3_HSYNC_N), PINMUX_IPSR_MODSEL_DATA(IP5_5_3, VI2_HSYNC_N, SEL_VI2_0), @@ -1102,7 +1102,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP5_23_21, VI2_R6), PINMUX_IPSR_MODSEL_DATA(IP5_23_21, SCIFA0_CTS_N_B, SEL_SCFA_1), PINMUX_IPSR_MODSEL_DATA(IP5_23_21, IERX_C, SEL_IEB_2), - PINMUX_IPSR_DATA(IP5_26_24, EX_WAIT0), + PINMUX_IPSR_MODSEL_DATA(IP5_26_24, EX_WAIT0, SEL_LBS_0), PINMUX_IPSR_DATA(IP5_26_24, IRQ3), PINMUX_IPSR_DATA(IP5_26_24, INTC_IRQ3_N), PINMUX_IPSR_MODSEL_DATA(IP5_26_24, VI3_CLK, SEL_VI3_0), @@ -1183,8 +1183,8 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP7_2_0, SIM0_D_C, SEL_SIM_2), PINMUX_IPSR_MODSEL_DATA(IP7_2_0, HCTS0_N_F, SEL_HSCIF0_5), PINMUX_IPSR_DATA(IP7_5_3, ETH_TXD1), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_4), - PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_SIM_2), + PINMUX_IPSR_MODSEL_DATA(IP7_5_3, HTX0_F, SEL_HSCIF0_5), + PINMUX_IPSR_MODSEL_DATA(IP7_5_3, BPFCLK_G, SEL_FM_6), PINMUX_IPSR_DATA(IP7_7_6, ETH_TX_EN), PINMUX_IPSR_MODSEL_DATA(IP7_7_6, SIM0_CLK_C, SEL_SIM_2), PINMUX_IPSR_MODSEL_DATA(IP7_7_6, HRTS0_N_F, SEL_HSCIF0_5), @@ -1261,7 +1261,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP8_25_24, SCIFA1_RTS_N_D, SEL_SCIFA1_3), PINMUX_IPSR_DATA(IP8_25_24, AVB_MAGIC), PINMUX_IPSR_MODSEL_DATA(IP8_26, VI1_DATA5_VI1_B5, SEL_VI1_0), - PINMUX_IPSR_MODSEL_DATA(IP8_26, AVB_PHY_INT, SEL_SCIFA1_3), + PINMUX_IPSR_DATA(IP8_26, AVB_PHY_INT), PINMUX_IPSR_MODSEL_DATA(IP8_27, VI1_DATA6_VI1_B6, SEL_VI1_0), PINMUX_IPSR_DATA(IP8_27, AVB_GTXREFCLK), PINMUX_IPSR_DATA(IP8_28, SD0_CLK), @@ -1465,7 +1465,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP12_5_4, MOUT5), PINMUX_IPSR_DATA(IP12_7_6, SSI_SDATA2), PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_RX_B, SEL_CAN1_1), - PINMUX_IPSR_MODSEL_DATA(IP12_7_6, CAN1_TX_B, SEL_CAN1_1), + PINMUX_IPSR_DATA(IP12_7_6, SSI_SCK1), PINMUX_IPSR_DATA(IP12_7_6, MOUT6), PINMUX_IPSR_DATA(IP12_10_8, SSI_SCK34), PINMUX_IPSR_DATA(IP12_10_8, STP_OPWM_0), @@ -1602,11 +1602,11 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_DATA(IP14_11_9, LCDOUT1), PINMUX_IPSR_MODSEL_DATA(IP14_15_12, SCIFA0_CTS_N, SEL_SCFA_0), PINMUX_IPSR_MODSEL_DATA(IP14_15_12, HCTS1_N, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, CTS0_N, SEL_SCIF0_0), + PINMUX_IPSR_DATA(IP14_15_12, CTS0_N), PINMUX_IPSR_MODSEL_DATA(IP14_15_12, MSIOF3_SYNC, SEL_SOF3_0), PINMUX_IPSR_DATA(IP14_15_12, DU2_DG3), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, LCDOUT11, SEL_HSCIF1_0), - PINMUX_IPSR_MODSEL_DATA(IP14_15_12, PWM0_B, SEL_SCIF0_0), + PINMUX_IPSR_DATA(IP14_15_12, LCDOUT11), + PINMUX_IPSR_DATA(IP14_15_12, PWM0_B), PINMUX_IPSR_MODSEL_DATA(IP14_15_12, IIC1_SCL_C, SEL_IIC1_2), PINMUX_IPSR_MODSEL_DATA(IP14_15_12, I2C1_SCL_C, SEL_I2C1_2), PINMUX_IPSR_MODSEL_DATA(IP14_18_16, SCIFA0_RTS_N, SEL_SCFA_0), @@ -1646,7 +1646,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP15_2_0, MSIOF3_SCK, SEL_SOF3_0), PINMUX_IPSR_DATA(IP15_2_0, DU2_DG7), PINMUX_IPSR_DATA(IP15_2_0, LCDOUT15), - PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_0), + PINMUX_IPSR_MODSEL_DATA(IP15_2_0, SCIF_CLK_B, SEL_SCIFCLK_1), PINMUX_IPSR_MODSEL_DATA(IP15_5_3, SCIFA2_RXD, SEL_SCIFA2_0), PINMUX_IPSR_MODSEL_DATA(IP15_5_3, FMIN, SEL_FM_0), PINMUX_IPSR_MODSEL_DATA(IP15_5_3, TX2, SEL_SCIF2_0), @@ -1665,8 +1665,7 @@ static const u16 pinmux_data[] = { PINMUX_IPSR_MODSEL_DATA(IP15_11_9, TS_SDEN0, SEL_TSIF0_0), PINMUX_IPSR_DATA(IP15_11_9, DU2_DG4), PINMUX_IPSR_DATA(IP15_11_9, LCDOUT12), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_IIC2_0), - PINMUX_IPSR_MODSEL_DATA(IP15_11_9, I2C2_SDA, SEL_I2C2_0), + PINMUX_IPSR_MODSEL_DATA(IP15_11_9, HCTS0_N_C, SEL_HSCIF0_2), PINMUX_IPSR_MODSEL_DATA(IP15_13_12, HRX0, SEL_HSCIF0_0), PINMUX_IPSR_DATA(IP15_13_12, DU2_DB2), PINMUX_IPSR_DATA(IP15_13_12, LCDOUT18),