From patchwork Fri Dec 13 08:21:46 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Sangorrin X-Patchwork-Id: 3347641 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 54D5B9F243 for ; Sat, 14 Dec 2013 08:08:30 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 805E6206AF for ; Sat, 14 Dec 2013 08:08:29 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) by mail.kernel.org (Postfix) with ESMTP id A6DEA20781 for ; Sat, 14 Dec 2013 08:08:28 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [IPv6:::1]) by mail.linuxfoundation.org (Postfix) with ESMTP id D536BB8F; Sat, 14 Dec 2013 08:06:43 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTP id 7086225F for ; Fri, 13 Dec 2013 08:39:24 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from imx9.toshiba.co.jp (imx9.toshiba.co.jp [202.33.96.51]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id DD12F1F8C3 for ; Fri, 13 Dec 2013 08:39:23 +0000 (UTC) Received: from imx2.toshiba.co.jp (imx2 [202.33.96.24]) by imx9.toshiba.co.jp with ESMTP id rBD8NNie024984 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 13 Dec 2013 17:23:23 +0900 (JST) Received: from arc1.toshiba.co.jp ([133.199.194.235]) by imx2.toshiba.co.jp with ESMTP id rBD8NKlN015684; Fri, 13 Dec 2013 17:23:20 +0900 (JST) Received: (from root@localhost) by arc1.toshiba.co.jp id rBD8NK8N000293; Fri, 13 Dec 2013 17:23:20 +0900 (JST) Received: from unknown [133.199.192.144] by arc1.toshiba.co.jp with ESMTP id TAA00290; Fri, 13 Dec 2013 17:23:20 +0900 Received: from mx12.toshiba.co.jp (localhost [127.0.0.1]) by ovp2.toshiba.co.jp with ESMTP id rBD8NJu6015988; Fri, 13 Dec 2013 17:23:19 +0900 (JST) Received: from BK2211.rdc.toshiba.co.jp by toshiba.co.jp id rBD8NIfZ008639; Fri, 13 Dec 2013 17:23:19 +0900 (JST) Received: from island.swc.toshiba.co.jp (localhost [127.0.0.1]) by BK2211.rdc.toshiba.co.jp (8.13.8+Sun/8.13.8) with ESMTP id rBD8NILJ027225; Fri, 13 Dec 2013 17:23:18 +0900 (JST) Received: from ubuntu.swc.toshiba.co.jp (unknown [133.196.174.184]) by island.swc.toshiba.co.jp (Postfix) with ESMTP id 03CA740018; Fri, 13 Dec 2013 17:22:32 +0900 (JST) From: Daniel Sangorrin To: ltsi-dev@lists.linuxfoundation.org Date: Fri, 13 Dec 2013 17:21:46 +0900 Message-Id: <1386922983-22135-32-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1386922983-22135-1-git-send-email-daniel.sangorrin@toshiba.co.jp> References: <1386922983-22135-1-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Mailman-Approved-At: Sat, 14 Dec 2013 08:06:34 +0000 Cc: michal.simek@xilinx.com Subject: [LTSI-dev] [PATCH 031/108] GPIO: xilinx: Use __raw_readl/__raw_writel IO functions X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org X-Virus-Scanned: ClamAV using ClamSMTP From: Michal Simek This driver can be used on Xilinx ARM Zynq platform where in_be32/out_be32 functions are not implemented. Use __raw_readl/__raw_writel functions which are implemented on Microblaze and PowerPC. For ARM readl/writel functions are used instead. The correct way how to implement this is to detect endians directly on IP. But for the gpio case without interrupt connected(it means without interrupt logic) there are just 2 registers data and tristate where auto detection can't be done. Signed-off-by: Michal Simek Signed-off-by: Linus Walleij (cherry picked from commit cc090d61d1a88f30f2fb75a91bce684ad1bd2e94) Signed-off-by: Daniel Sangorrin Signed-off-by: Yoshitake Kobayashi --- drivers/gpio/gpio-xilinx.c | 9 +++++++-- 1 file changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/gpio/gpio-xilinx.c b/drivers/gpio/gpio-xilinx.c index 626eaa8..791ddae 100644 --- a/drivers/gpio/gpio-xilinx.c +++ b/drivers/gpio/gpio-xilinx.c @@ -30,8 +30,13 @@ #define XGPIO_CHANNEL_OFFSET 0x8 /* Read/Write access to the GPIO registers */ -#define xgpio_readreg(offset) in_be32(offset) -#define xgpio_writereg(offset, val) out_be32(offset, val) +#ifdef CONFIG_ARCH_ZYNQ +# define xgpio_readreg(offset) readl(offset) +# define xgpio_writereg(offset, val) writel(val, offset) +#else +# define xgpio_readreg(offset) __raw_readl(offset) +# define xgpio_writereg(offset, val) __raw_writel(val, offset) +#endif /** * struct xgpio_instance - Stores information about GPIO device