From patchwork Fri Dec 13 08:22:49 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Sangorrin X-Patchwork-Id: 3338991 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork1.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork1.web.kernel.org (Postfix) with ESMTP id 8C7A49F243 for ; Fri, 13 Dec 2013 08:40:49 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id 35D56205B4 for ; Fri, 13 Dec 2013 08:40:48 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) by mail.kernel.org (Postfix) with ESMTP id D6A14207D3 for ; Fri, 13 Dec 2013 08:40:46 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [IPv6:::1]) by mail.linuxfoundation.org (Postfix) with ESMTP id 7C802941; Fri, 13 Dec 2013 08:40:28 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTP id B3AED847 for ; Fri, 13 Dec 2013 08:40:26 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from imx9.toshiba.co.jp (imx9.toshiba.co.jp [202.33.96.51]) by smtp1.linuxfoundation.org (Postfix) with ESMTP id 293231F889 for ; Fri, 13 Dec 2013 08:40:26 +0000 (UTC) Received: from imx2.toshiba.co.jp (imx2 [202.33.96.24]) by imx9.toshiba.co.jp with ESMTP id rBD8NSKH025139 (version=TLSv1/SSLv3 cipher=DHE-RSA-AES256-SHA bits=256 verify=NO) for ; Fri, 13 Dec 2013 17:23:28 +0900 (JST) Received: from arc1.toshiba.co.jp ([133.199.194.235]) by imx2.toshiba.co.jp with ESMTP id rBD8NPBD015826; Fri, 13 Dec 2013 17:23:25 +0900 (JST) Received: (from root@localhost) by arc1.toshiba.co.jp id rBD8NPeo000517; Fri, 13 Dec 2013 17:23:25 +0900 (JST) Received: from unknown [133.199.192.144] by arc1.toshiba.co.jp with ESMTP id TAA00489; Fri, 13 Dec 2013 17:23:25 +0900 Received: from mx12.toshiba.co.jp (localhost [127.0.0.1]) by ovp2.toshiba.co.jp with ESMTP id rBD8NNEU016139; Fri, 13 Dec 2013 17:23:24 +0900 (JST) Received: from BK2211.rdc.toshiba.co.jp by toshiba.co.jp id rBD8NNPw008798; Fri, 13 Dec 2013 17:23:23 +0900 (JST) Received: from island.swc.toshiba.co.jp (localhost [127.0.0.1]) by BK2211.rdc.toshiba.co.jp (8.13.8+Sun/8.13.8) with ESMTP id rBD8NMs3027416; Fri, 13 Dec 2013 17:23:22 +0900 (JST) Received: from ubuntu.swc.toshiba.co.jp (unknown [133.196.174.184]) by island.swc.toshiba.co.jp (Postfix) with ESMTP id 6CDBA4001A; Fri, 13 Dec 2013 17:22:33 +0900 (JST) From: Daniel Sangorrin To: ltsi-dev@lists.linuxfoundation.org Date: Fri, 13 Dec 2013 17:22:49 +0900 Message-Id: <1386922983-22135-95-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1386922983-22135-1-git-send-email-daniel.sangorrin@toshiba.co.jp> References: <1386922983-22135-1-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org Cc: michal.simek@xilinx.com Subject: [LTSI-dev] [PATCH 094/108] video: xilinxfb: Rename PLB_ACCESS_FLAG to BUS_ACCESS_FLAG X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org X-Virus-Scanned: ClamAV using ClamSMTP From: Michal Simek Using only PLB name is wrong for a long time because the same access functions are also used for AXI. s/PLB/BUS/g Signed-off-by: Michal Simek Acked-by: Arnd Bergmann Signed-off-by: Tomi Valkeinen (cherry picked from commit 5130af35bf34e7b57e86c7f72c08b8c68adbb425) Signed-off-by: Daniel Sangorrin Signed-off-by: Yoshitake Kobayashi --- drivers/video/xilinxfb.c | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/drivers/video/xilinxfb.c b/drivers/video/xilinxfb.c index c9b442b..d94c992 100644 --- a/drivers/video/xilinxfb.c +++ b/drivers/video/xilinxfb.c @@ -44,7 +44,7 @@ /* - * Xilinx calls it "PLB TFT LCD Controller" though it can also be used for + * Xilinx calls it "TFT LCD Controller" though it can also be used for * the VGA port on the Xilinx ML40x board. This is a hardware display * controller for a 640x480 resolution TFT or VGA screen. * @@ -54,11 +54,11 @@ * don't start thinking about scrolling). The second allows the LCD to * be turned on or off as well as rotated 180 degrees. * - * In case of direct PLB access the second control register will be at + * In case of direct BUS access the second control register will be at * an offset of 4 as compared to the DCR access where the offset is 1 * i.e. REG_CTRL. So this is taken care in the function * xilinx_fb_out32 where it left shifts the offset 2 times in case of - * direct PLB access. + * direct BUS access. */ #define NUM_REGS 2 #define REG_FB_ADDR 0 @@ -116,7 +116,7 @@ static struct fb_var_screeninfo xilinx_fb_var = { }; -#define PLB_ACCESS_FLAG 0x1 /* 1 = PLB, 0 = DCR */ +#define BUS_ACCESS_FLAG 0x1 /* 1 = BUS, 0 = DCR */ struct xilinxfb_drvdata { @@ -146,14 +146,14 @@ struct xilinxfb_drvdata { container_of(_info, struct xilinxfb_drvdata, info) /* - * The XPS TFT Controller can be accessed through PLB or DCR interface. + * The XPS TFT Controller can be accessed through BUS or DCR interface. * To perform the read/write on the registers we need to check on * which bus its connected and call the appropriate write API. */ static void xilinx_fb_out32(struct xilinxfb_drvdata *drvdata, u32 offset, u32 val) { - if (drvdata->flags & PLB_ACCESS_FLAG) + if (drvdata->flags & BUS_ACCESS_FLAG) out_be32(drvdata->regs + (offset << 2), val); #ifdef CONFIG_PPC_DCR else @@ -235,10 +235,10 @@ static int xilinxfb_assign(struct device *dev, int rc; int fbsize = pdata->xvirt * pdata->yvirt * BYTES_PER_PIXEL; - if (drvdata->flags & PLB_ACCESS_FLAG) { + if (drvdata->flags & BUS_ACCESS_FLAG) { /* * Map the control registers in if the controller - * is on direct PLB interface. + * is on direct BUS interface. */ if (!request_mem_region(physaddr, 8, DRIVER_NAME)) { dev_err(dev, "Couldn't lock memory region at 0x%08lX\n", @@ -270,7 +270,7 @@ static int xilinxfb_assign(struct device *dev, if (!drvdata->fb_virt) { dev_err(dev, "Could not allocate frame buffer memory\n"); rc = -ENOMEM; - if (drvdata->flags & PLB_ACCESS_FLAG) + if (drvdata->flags & BUS_ACCESS_FLAG) goto err_fbmem; else goto err_region; @@ -323,7 +323,7 @@ static int xilinxfb_assign(struct device *dev, goto err_regfb; } - if (drvdata->flags & PLB_ACCESS_FLAG) { + if (drvdata->flags & BUS_ACCESS_FLAG) { /* Put a banner in the log (for DEBUG) */ dev_dbg(dev, "regs: phys=%lx, virt=%p\n", physaddr, drvdata->regs); @@ -348,11 +348,11 @@ err_cmap: xilinx_fb_out32(drvdata, REG_CTRL, 0); err_fbmem: - if (drvdata->flags & PLB_ACCESS_FLAG) + if (drvdata->flags & BUS_ACCESS_FLAG) iounmap(drvdata->regs); err_map: - if (drvdata->flags & PLB_ACCESS_FLAG) + if (drvdata->flags & BUS_ACCESS_FLAG) release_mem_region(physaddr, 8); err_region: @@ -384,7 +384,7 @@ static int xilinxfb_release(struct device *dev) xilinx_fb_out32(drvdata, REG_CTRL, 0); /* Release the resources, as allocated based on interface */ - if (drvdata->flags & PLB_ACCESS_FLAG) { + if (drvdata->flags & BUS_ACCESS_FLAG) { iounmap(drvdata->regs); release_mem_region(drvdata->regs_phys, 8); } @@ -423,18 +423,18 @@ static int xilinxfb_of_probe(struct platform_device *op) } /* - * To check whether the core is connected directly to DCR or PLB + * To check whether the core is connected directly to DCR or BUS * interface and initialize the tft_access accordingly. */ of_property_read_u32(op->dev.of_node, "xlnx,dcr-splb-slave-if", &tft_access); /* - * Fill the resource structure if its direct PLB interface + * Fill the resource structure if its direct BUS interface * otherwise fill the dcr_host structure. */ if (tft_access) { - drvdata->flags |= PLB_ACCESS_FLAG; + drvdata->flags |= BUS_ACCESS_FLAG; rc = of_address_to_resource(op->dev.of_node, 0, &res); if (rc) { dev_err(&op->dev, "invalid address\n");