From patchwork Fri Dec 13 08:36:04 2013 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Daniel Sangorrin X-Patchwork-Id: 3347281 Return-Path: X-Original-To: patchwork-ltsi-dev@patchwork.kernel.org Delivered-To: patchwork-parsemail@patchwork2.web.kernel.org Received: from mail.kernel.org (mail.kernel.org [198.145.19.201]) by patchwork2.web.kernel.org (Postfix) with ESMTP id 04597C0D4A for ; Sat, 14 Dec 2013 08:07:13 +0000 (UTC) Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id E726B206AF for ; Sat, 14 Dec 2013 08:07:11 +0000 (UTC) Received: from mail.linuxfoundation.org (mail.linuxfoundation.org [140.211.169.12]) by mail.kernel.org (Postfix) with ESMTP id A49BD20781 for ; Sat, 14 Dec 2013 08:07:10 +0000 (UTC) Received: from mail.linux-foundation.org (localhost [IPv6:::1]) by mail.linuxfoundation.org (Postfix) with ESMTP id AF218B31; Sat, 14 Dec 2013 08:06:38 +0000 (UTC) X-Original-To: ltsi-dev@lists.linuxfoundation.org Delivered-To: ltsi-dev@mail.linuxfoundation.org Received: from smtp1.linuxfoundation.org (smtp1.linux-foundation.org [172.17.192.35]) by mail.linuxfoundation.org (Postfix) with ESMTP id 8EAE8565 for ; Fri, 13 Dec 2013 08:36:13 +0000 (UTC) X-Greylist: domain auto-whitelisted by SQLgrey-1.7.6 Received: from imx2.toshiba.co.jp (inet-tsb5.toshiba.co.jp [202.33.96.24]) by smtp1.linuxfoundation.org (Postfix) with ESMTPS id 00B2A1F8C3 for ; Fri, 13 Dec 2013 08:36:11 +0000 (UTC) Received: from arc1.toshiba.co.jp ([133.199.194.235]) by imx2.toshiba.co.jp with ESMTP id rBD8a8nn023022; Fri, 13 Dec 2013 17:36:08 +0900 (JST) Received: (from root@localhost) by arc1.toshiba.co.jp id rBD8a8DT014847; Fri, 13 Dec 2013 17:36:08 +0900 (JST) Received: from unknown [133.199.192.144] by arc1.toshiba.co.jp with ESMTP id TAA14844; Fri, 13 Dec 2013 17:36:08 +0900 Received: from mx12.toshiba.co.jp (localhost [127.0.0.1]) by ovp2.toshiba.co.jp with ESMTP id rBD8a8BO024709; Fri, 13 Dec 2013 17:36:08 +0900 (JST) Received: from BK2211.rdc.toshiba.co.jp by toshiba.co.jp id rBD8a8W1002966; Fri, 13 Dec 2013 17:36:08 +0900 (JST) Received: from island.swc.toshiba.co.jp (localhost [127.0.0.1]) by BK2211.rdc.toshiba.co.jp (8.13.8+Sun/8.13.8) with ESMTP id rBD8a8ZR028030; Fri, 13 Dec 2013 17:36:08 +0900 (JST) Received: from ubuntu.swc.toshiba.co.jp (unknown [133.196.174.184]) by island.swc.toshiba.co.jp (Postfix) with ESMTP id 5CCD840004; Fri, 13 Dec 2013 17:35:21 +0900 (JST) From: Daniel Sangorrin To: ltsi-dev@lists.linuxfoundation.org Date: Fri, 13 Dec 2013 17:36:04 +0900 Message-Id: <1386923766-22543-3-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Mailer: git-send-email 1.8.5 In-Reply-To: <1386923766-22543-1-git-send-email-daniel.sangorrin@toshiba.co.jp> References: <1386923766-22543-1-git-send-email-daniel.sangorrin@toshiba.co.jp> X-Spam-Status: No, score=-2.3 required=5.0 tests=BAYES_00,RP_MATCHES_RCVD, UNPARSEABLE_RELAY autolearn=unavailable version=3.3.1 X-Spam-Checker-Version: SpamAssassin 3.3.1 (2010-03-16) on mail.kernel.org X-Mailman-Approved-At: Sat, 14 Dec 2013 08:06:34 +0000 Cc: michal.simek@xilinx.com Subject: [LTSI-dev] [PATCH 2/4] arm: dts: zynq: Merge zynq-zc702.dts with Xilinx repository X-BeenThere: ltsi-dev@lists.linuxfoundation.org X-Mailman-Version: 2.1.12 Precedence: list List-Id: "A list to discuss patches, development, and other things related to the LTSI project" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: ltsi-dev-bounces@lists.linuxfoundation.org Errors-To: ltsi-dev-bounces@lists.linuxfoundation.org X-Virus-Scanned: ClamAV using ClamSMTP From: Soren Brinkmann This patch updates the zynq zc702 device tree by merging some parts from the corresponding file in the Xilinx repository (commit f563137b8c19a94db91593732d5d4f1524c24af1) Signed-off-by: Daniel Sangorrin Signed-off-by: Yoshitake Kobayashi --- arch/arm/boot/dts/zynq-zc702.dts | 220 ++++++++++++++++++++++++++++++++++----- 1 file changed, 194 insertions(+), 26 deletions(-) diff --git a/arch/arm/boot/dts/zynq-zc702.dts b/arch/arm/boot/dts/zynq-zc702.dts index 21aea99..e03bd72 100644 --- a/arch/arm/boot/dts/zynq-zc702.dts +++ b/arch/arm/boot/dts/zynq-zc702.dts @@ -1,34 +1,202 @@ /* - * Copyright (C) 2011 Xilinx - * Copyright (C) 2012 National Instruments Corp. + * Device Tree Generator version: 1.1 * - * This software is licensed under the terms of the GNU General Public - * License version 2, as published by the Free Software Foundation, and - * may be copied, distributed, and modified under those terms. + * (C) Copyright 2007-2013 Xilinx, Inc. + * (C) Copyright 2007-2013 Michal Simek + * (C) Copyright 2007-2012 PetaLogix Qld Pty Ltd + * + * Michal SIMEK + * + * CAUTION: This file is automatically generated by libgen. + * Version: Xilinx EDK 14.5 EDK_P.58f * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. */ -/dts-v1/; -/include/ "zynq-7000.dtsi" +/dts-v1/; / { - model = "Zynq ZC702 Development Board"; - compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; - - memory { + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,zynq-7000"; + model = "Xilinx Zynq"; + aliases { + ethernet0 = &ps7_ethernet_0; + serial0 = &ps7_uart_1; + } ; + chosen { + bootargs = "console=ttyPS0,115200 root=/dev/ram rw earlyprintk"; + linux,stdout-path = "/amba@0/serial@e0001000"; + } ; + cpus { + #address-cells = <1>; + #size-cells = <0>; + ps7_cortexa9_0: cpu@0 { + bus-handle = <&ps7_axi_interconnect_0>; + compatible = "arm,cortex-a9"; + d-cache-line-size = <0x20>; + d-cache-size = <0x8000>; + device_type = "cpu"; + i-cache-line-size = <0x20>; + i-cache-size = <0x8000>; + interrupt-handle = <&ps7_scugic_0>; + reg = <0x0>; + } ; + ps7_cortexa9_1: cpu@1 { + bus-handle = <&ps7_axi_interconnect_0>; + compatible = "arm,cortex-a9"; + d-cache-line-size = <0x20>; + d-cache-size = <0x8000>; + device_type = "cpu"; + i-cache-line-size = <0x20>; + i-cache-size = <0x8000>; + interrupt-handle = <&ps7_scugic_0>; + reg = <0x1>; + } ; + } ; + ps7_ddr_0: memory@0 { device_type = "memory"; reg = <0x0 0x40000000>; - }; - - chosen { - bootargs = "console=ttyPS0,115200 earlyprintk"; - }; - -}; - -&uart1 { - status = "okay"; -}; + } ; + ps7_axi_interconnect_0: amba@0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "xlnx,ps7-axi-interconnect-1.00.a", "simple-bus"; + ranges ; + ps7_dma_s: ps7-dma@f8003000 { + #dma-cells = <1>; + #dma-channels = <8>; + #dma-requests = <4>; + arm,primecell-periphid = <0x41330>; + clock-names = "apb_pclk"; + clocks = <&clkc 27>; + compatible = "xlnx,ps7-dma-1.00.a", "arm,primecell", "arm,pl330"; + interrupt-names = "abort", "dma0", "dma1", "dma2", "dma3", + "dma4", "dma5", "dma6", "dma7"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 13 4>, <0 14 4>, <0 15 4>, <0 16 4>, <0 17 4>, <0 40 4>, <0 41 4>, <0 42 4>, <0 43 4>; + reg = <0xf8003000 0x1000>; + } ; + ps7_ethernet_0: ps7-ethernet@e000b000 { + #address-cells = <1>; + #size-cells = <0>; + clock-names = "ref_clk", "aper_clk"; + clocks = <&clkc 13>, <&clkc 30>; + compatible = "xlnx,ps7-ethernet-1.00.a"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 22 4>; + local-mac-address = [00 0a 35 00 00 00]; + phy-handle = <&phy0>; + phy-mode = "rgmii-id"; + reg = <0xe000b000 0x1000>; + xlnx,enet-reset = "MIO 11"; + xlnx,eth-mode = <0x1>; + xlnx,has-mdio = <0x1>; + xlnx,ptp-enet-clock = <111111115>; + mdio { + #address-cells = <1>; + #size-cells = <0>; + phy0: phy@7 { + compatible = "marvell,88e1116r"; + device_type = "ethernet-phy"; + reg = <7>; + } ; + } ; + } ; + ps7_pl310_0: ps7-pl310@f8f02000 { + arm,data-latency = <3 2 2>; + arm,tag-latency = <2 2 2>; + cache-level = <2>; + cache-unified ; + compatible = "xlnx,ps7-pl310-1.00.a", "arm,pl310-cache"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 2 4>; + reg = <0xf8f02000 0x1000>; + } ; + ps7_ram_0: ps7-ram@0 { + compatible = "xlnx,ps7-ram-1.00.a", "xlnx,ps7-ocm"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 3 4>; + reg = <0xfffc0000 0x40000>; + } ; + ps7_scugic_0: ps7-scugic@f8f01000 { + #address-cells = <2>; + #interrupt-cells = <3>; + #size-cells = <1>; + compatible = "xlnx,ps7-scugic-1.00.a", "arm,cortex-a9-gic", "arm,gic"; + interrupt-controller ; + num_cpus = <2>; + num_interrupts = <96>; + reg = <0xf8f01000 0x1000>, <0xf8f00100 0x100>; + } ; + ps7_scutimer_0: ps7-scutimer@f8f00600 { + clocks = <&clkc 4>; + compatible = "xlnx,ps7-scutimer-1.00.a", "arm,cortex-a9-twd-timer"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <1 13 0x301>; + reg = <0xf8f00600 0x20>; + } ; + ps7_scuwdt_0: ps7-scuwdt@f8f00620 { + clocks = <&clkc 4>; + compatible = "xlnx,ps7-scuwdt-1.00.a"; + device_type = "watchdog"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <1 14 0x301>; + reg = <0xf8f00620 0xe0>; + } ; + ps7_sd_0: ps7-sdio@e0100000 { + clock-frequency = <50000000>; + clock-names = "ref_clk", "aper_clk"; + clocks = <&clkc 21>, <&clkc 32>; + compatible = "xlnx,ps7-sdio-1.00.a", "generic-sdhci", "arasan,sdhci"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 24 4>; + reg = <0xe0100000 0x1000>; + xlnx,has-cd = <0x1>; + xlnx,has-power = <0x0>; + xlnx,has-wp = <0x1>; + } ; + ps7_slcr_0: ps7-slcr@f8000000 { + compatible = "xlnx,ps7-slcr-1.00.a", "xlnx,zynq-slcr"; + reg = <0xf8000000 0x1000>; + clocks { + #address-cells = <1>; + #size-cells = <0>; + clkc: clkc { + #clock-cells = <1>; + clock-output-names = "armpll", "ddrpll", "iopll", "cpu_6or4x", "cpu_3or2x", + "cpu_2x", "cpu_1x", "ddr2x", "ddr3x", "dci", + "lqspi", "smc", "pcap", "gem0", "gem1", + "fclk0", "fclk1", "fclk2", "fclk3", "can0", + "can1", "sdio0", "sdio1", "uart0", "uart1", + "spi0", "spi1", "dma", "usb0_aper", "usb1_aper", + "gem0_aper", "gem1_aper", "sdio0_aper", "sdio1_aper", "spi0_aper", + "spi1_aper", "can0_aper", "can1_aper", "i2c0_aper", "i2c1_aper", + "uart0_aper", "uart1_aper", "gpio_aper", "lqspi_aper", "smc_aper", + "swdt", "dbg_trc", "dbg_apb"; + compatible = "xlnx,ps7-clkc"; + fclk-enable = <0xf>; + ps-clk-frequency = <33333333>; + } ; + } ; + } ; + ps7_ttc_0: ps7-ttc@f8001000 { + clocks = <&clkc 6>; + compatible = "xlnx,ps7-ttc-1.00.a", "cdns,ttc"; + interrupt-names = "ttc0", "ttc1", "ttc2"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 10 4>, <0 11 4>, <0 12 4>; + reg = <0xf8001000 0x1000>; + } ; + ps7_uart_1: serial@e0001000 { + clock-names = "ref_clk", "aper_clk"; + clocks = <&clkc 24>, <&clkc 41>; + compatible = "xlnx,ps7-uart-1.00.a", "xlnx,xuartps"; + current-speed = <115200>; + device_type = "serial"; + interrupt-parent = <&ps7_scugic_0>; + interrupts = <0 50 4>; + port-number = <0>; + reg = <0xe0001000 0x1000>; + xlnx,has-modem = <0x0>; + } ; + } ; +} ;