Message ID | 1610292623-15564-1-git-send-email-stefanc@marvell.com (mailing list archive) |
---|---|
Headers | show |
Series | net: mvpp2: Add TX Flow Control support | expand |
Hi, On Sun, Jan 10, 2021 at 05:30:04PM +0200, stefanc@marvell.com wrote: > Armada hardware has a pause generation mechanism in GOP (MAC). > GOP has to generate flow control frames based on an indication > programmed in Ports Control 0 Register. There is a bit per port. > However assertion of the PortX Pause bits in the ports control 0 register > only sends a one time pause. To complement the function the GOP has > a mechanism to periodically send pause control messages based on periodic counters. > This mechanism ensures that the pause is effective as long as the Appropriate PortX Pause > is asserted. Can you ensure that your commit messages are consistently wrapped? Some lines are wrapped others aren't. > Problem is that Packet Processor witch actually can drop packets due to lack of resources Does the packet processor engage in magic or witchcraft? I suppose some would argue that firmware does "magic"! However, I think you mean "which". :) > not connected to the GOP flow control generation mechanism. > To solve this issue Armada has firmware running on CM3 CPU dedectated for Flow Control > support. Firmware monitors Packet Processor resources and asserts XON/XOFF by writing > to Ports Control 0 Register. What is the minimum firmware version that supports this?
> > not connected to the GOP flow control generation mechanism. > > To solve this issue Armada has firmware running on CM3 CPU dedectated > > for Flow Control support. Firmware monitors Packet Processor resources > > and asserts XON/XOFF by writing to Ports Control 0 Register. > > What is the minimum firmware version that supports this? > Support were added to firmware about two years ago. All releases from 18.09 should has it. Stefan, Regards.
On Sun, Jan 10, 2021 at 06:55:11PM +0000, Stefan Chulski wrote: > > > not connected to the GOP flow control generation mechanism. > > > To solve this issue Armada has firmware running on CM3 CPU dedectated > > > for Flow Control support. Firmware monitors Packet Processor resources > > > and asserts XON/XOFF by writing to Ports Control 0 Register. > > > > What is the minimum firmware version that supports this? > > > > Support were added to firmware about two years ago. > All releases from 18.09 should has it. Please add that vital bit of information somewhere appropriate. I would not be surprised if people are still running e.g. 17.10 on some of their Armada 8040 boards. My Macchiatobin which is acting as a server currently has 17.10, although I plan to upgrade it to 18.12 in about three to six months time, once I've well and truely proven that my ext4 problems are resolved.
On Sun, Jan 10, 2021 at 06:55:11PM +0000, Stefan Chulski wrote: > > > not connected to the GOP flow control generation mechanism. > > > To solve this issue Armada has firmware running on CM3 CPU dedectated > > > for Flow Control support. Firmware monitors Packet Processor resources > > > and asserts XON/XOFF by writing to Ports Control 0 Register. > > > > What is the minimum firmware version that supports this? > > > > Support were added to firmware about two years ago. > All releases from 18.09 should has it. Can you query the firmware and ask its version? We should keep all this code disabled if the firmware it too old. Andrew
> > On Sun, Jan 10, 2021 at 06:55:11PM +0000, Stefan Chulski wrote: > > > > not connected to the GOP flow control generation mechanism. > > > > To solve this issue Armada has firmware running on CM3 CPU > > > > dedectated for Flow Control support. Firmware monitors Packet > > > > Processor resources and asserts XON/XOFF by writing to Ports Control 0 > Register. > > > > > > What is the minimum firmware version that supports this? > > > > > > > Support were added to firmware about two years ago. > > All releases from 18.09 should has it. > > Can you query the firmware and ask its version? We should keep all this code > disabled if the firmware it too old. > > Andrew This is exactly what " net: mvpp2: add TX FC firmware check " patch do. If handshake of flow control support fail, FC won't be supported. Stefan.
On Sun, Jan 10, 2021 at 07:11:53PM +0000, Stefan Chulski wrote: > > > > On Sun, Jan 10, 2021 at 06:55:11PM +0000, Stefan Chulski wrote: > > > > > not connected to the GOP flow control generation mechanism. > > > > > To solve this issue Armada has firmware running on CM3 CPU > > > > > dedectated for Flow Control support. Firmware monitors Packet > > > > > Processor resources and asserts XON/XOFF by writing to Ports Control 0 > > Register. > > > > > > > > What is the minimum firmware version that supports this? > > > > > > > > > > Support were added to firmware about two years ago. > > > All releases from 18.09 should has it. > > > > Can you query the firmware and ask its version? We should keep all this code > > disabled if the firmware it too old. > > > > Andrew > > This is exactly what " net: mvpp2: add TX FC firmware check " patch > do. If handshake of flow control support fail, FC won't be > supported. Ah, O.K. Please extend the kernel log message to include the minimum firmware version. Andrew
From: Stefan Chulski <stefanc@marvell.com> Armada hardware has a pause generation mechanism in GOP (MAC). GOP has to generate flow control frames based on an indication programmed in Ports Control 0 Register. There is a bit per port. However assertion of the PortX Pause bits in the ports control 0 register only sends a one time pause. To complement the function the GOP has a mechanism to periodically send pause control messages based on periodic counters. This mechanism ensures that the pause is effective as long as the Appropriate PortX Pause is asserted. Problem is that Packet Processor witch actually can drop packets due to lack of resources not connected to the GOP flow control generation mechanism. To solve this issue Armada has firmware running on CM3 CPU dedectated for Flow Control support. Firmware monitors Packet Processor resources and asserts XON/XOFF by writing to Ports Control 0 Register. MSS shared memory used to communicate between CM3 firmware and MVPP2 driver. During init MVPP2 driver informs firmware about used BM pools, RXQs and congestion and depletion thresholds. The pause is generated whenever congestion or depletion in resources is detected. The back pressure is stopped when the resource reaches a sufficient level. So the congestion/depletion and sufficient implement a hysteresis mechanism that reduces the toggle frequency. For buffer pools which are a depletion means that a pause frame should be generated. For this the SW needs to poll BPPINumberOfPointers and BPPENumberOfPoint. For queues congestion means that a pause frame should be generated. For this the SW needs to poll OccupiedDescriptorsCounter. Packet Processor v23 has hardware support to monitor FIFO fill level. patch "add PPv23 version definition" to differ between v23 and v22 hardware. Patch "add TX FC firmware check" verifies that CM3 firmware support Flow Control monitoring. Konstantin Porotchkin (1): dts: marvell: add CM3 SRAM memory to cp115 ethernet device tree Stefan Chulski (18): doc: marvell: add cm3-mem device tree bindings description net: mvpp2: add CM3 SRAM memory map net: mvpp2: add PPv23 version definition net: mvpp2: always compare hw-version vs MVPP21 net: mvpp2: increase BM pool size to 2048 buffers net: mvpp2: increase RXQ size to 1024 descriptors net: mvpp2: add FCA periodic timer configurations net: mvpp2: add FCA RXQ non occupied descriptor threshold net: mvpp2: add spinlock for FW FCA configuration path net: mvpp2: add flow control RXQ and BM pool config callbacks net: mvpp2: enable global flow control net: mvpp2: add RXQ flow control configurations net: mvpp2: add ethtool flow control configuration support net: mvpp2: add BM protection underrun feature support net: mvpp2: add PPv23 RX FIFO flow control net: mvpp2: set 802.3x GoP Flow Control mode net: mvpp2: add ring size validation before enabling FC net: mvpp2: add TX FC firmware check Documentation/devicetree/bindings/net/marvell-pp2.txt | 1 + arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 + drivers/net/ethernet/marvell/mvpp2/mvpp2.h | 130 ++++- drivers/net/ethernet/marvell/mvpp2/mvpp2_main.c | 570 +++++++++++++++++++- 4 files changed, 669 insertions(+), 42 deletions(-)