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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 30 Sep 2024 19:55:48.8905 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 920b9578-35c8-4db2-486b-08dce189e17e X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB04.amd.com] X-MS-Exchange-CrossTenant-AuthSource: BL6PEPF00022572.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: MW5PR12MB5600 X-Patchwork-Delegate: kuba@kernel.org This patchset adds emaclite clock support. AXI Ethernet Lite IP can also be used on SoC platforms like Zynq UltraScale+ MPSoC which combines powerful processing system (PS) and user-programmable logic (PL) into the same device. On these platforms it is mandatory to explicitly enable IP clocks for proper functionality. Abin Joseph (3): dt-bindings: net: emaclite: Add clock support net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev() net: emaclite: Adopt clock support .../bindings/net/xlnx,emaclite.yaml | 3 +++ drivers/net/ethernet/xilinx/xilinx_emaclite.c | 22 ++++++++++--------- 2 files changed, 15 insertions(+), 10 deletions(-) base-commit: c824deb1a89755f70156b5cdaf569fca80698719