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Received-SPF: Pass (protection.outlook.com: domain of amd.com designates 165.204.84.17 as permitted sender) receiver=protection.outlook.com; client-ip=165.204.84.17; helo=SATLEXMB03.amd.com; pr=C Received: from SATLEXMB03.amd.com (165.204.84.17) by SN1PEPF0002636B.mail.protection.outlook.com (10.167.241.136) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.20.8048.13 via Frontend Transport; Mon, 7 Oct 2024 15:06:22 +0000 Received: from SATLEXMB04.amd.com (10.181.40.145) by SATLEXMB03.amd.com (10.181.40.144) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.2507.39; Mon, 7 Oct 2024 10:06:19 -0500 Received: from xhdradheys41.xilinx.com (10.180.168.240) by SATLEXMB04.amd.com (10.181.40.145) with Microsoft SMTP Server id 15.1.2507.39 via Frontend Transport; Mon, 7 Oct 2024 10:06:15 -0500 From: Radhey Shyam Pandey To: , , , , , , , , CC: , , , , , Radhey Shyam Pandey Subject: [PATCH net-next v2 0/3] net: xilinx: emaclite: Adopt clock support Date: Mon, 7 Oct 2024 20:36:00 +0530 Message-ID: <1728313563-722267-1-git-send-email-radhey.shyam.pandey@amd.com> X-Mailer: git-send-email 2.1.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 Received-SPF: None (SATLEXMB03.amd.com: radhey.shyam.pandey@amd.com does not designate permitted sender hosts) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF0002636B:EE_|LV2PR12MB5750:EE_ X-MS-Office365-Filtering-Correlation-Id: 7d9168e0-8056-4f07-5610-08dce6e19b3c X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|1800799024|36860700013|7416014|376014; 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X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 07 Oct 2024 15:06:22.5283 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 7d9168e0-8056-4f07-5610-08dce6e19b3c X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF0002636B.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: LV2PR12MB5750 X-Patchwork-Delegate: kuba@kernel.org This patchset adds emaclite clock support. AXI Ethernet Lite IP can also be used on SoC platforms like Zynq UltraScale+ MPSoC which combines powerful processing system (PS) and user-programmable logic (PL) into the same device. On these platforms it is mandatory to explicitly enable IP clocks for proper functionality. Changes for v2: - Make clocks as required property. Abin Joseph (3): dt-bindings: net: emaclite: Add clock support net: emaclite: Replace alloc_etherdev() with devm_alloc_etherdev() net: emaclite: Adopt clock support .../bindings/net/xlnx,emaclite.yaml | 5 +++++ drivers/net/ethernet/xilinx/xilinx_emaclite.c | 22 ++++++++++--------- 2 files changed, 17 insertions(+), 10 deletions(-)