From patchwork Wed Feb 10 16:47:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Michael Walle X-Patchwork-Id: 12081217 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-13.8 required=3.0 tests=BAYES_00,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SPF_HELO_NONE,SPF_PASS,USER_AGENT_GIT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 8880AC433E0 for ; Wed, 10 Feb 2021 16:49:25 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [23.128.96.18]) by mail.kernel.org (Postfix) with ESMTP id 3773464DD6 for ; Wed, 10 Feb 2021 16:49:25 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S233037AbhBJQtV (ORCPT ); Wed, 10 Feb 2021 11:49:21 -0500 Received: from ssl.serverraum.org ([176.9.125.105]:34623 "EHLO ssl.serverraum.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S232236AbhBJQsm (ORCPT ); Wed, 10 Feb 2021 11:48:42 -0500 Received: from mwalle01.fritz.box (unknown [IPv6:2a02:810c:c200:2e91:fa59:71ff:fe9b:b851]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange ECDHE (P-384) server-signature RSA-PSS (2048 bits) server-digest SHA256) (No client certificate requested) by ssl.serverraum.org (Postfix) with ESMTPSA id 6474522FB3; Wed, 10 Feb 2021 17:47:56 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=walle.cc; s=mail2016061301; t=1612975676; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding; bh=taQ9ZDXzhRhp/CcYP3gEH20xljinVs76d11A1gR7cew=; b=X51IBq6MjkTgRAu2HK7S4uFyCiNhixgtuHtzN99mNdXcDajwB4jWOS0F9oL3TXPp6NL94M bibb5KyNtdfg7CHes7KtsCc7aRF1Ez8F33zIQzCzQFrOfS8KchxBYJsizuG8YFUBqpkuC5 P8Ai0XFDBkDde6umC9L+nWXSW4l5/Eg= From: Michael Walle To: netdev@vger.kernel.org, linux-kernel@vger.kernel.org Cc: Andrew Lunn , Heiner Kallweit , Russell King , "David S . Miller" , Jakub Kicinski , Michael Walle Subject: [PATCH net-next v2 0/9] net: phy: icplus: cleanups and new features Date: Wed, 10 Feb 2021 17:47:37 +0100 Message-Id: <20210210164746.26336-1-michael@walle.cc> X-Mailer: git-send-email 2.20.1 MIME-Version: 1.0 Precedence: bulk List-ID: X-Mailing-List: netdev@vger.kernel.org X-Patchwork-Delegate: kuba@kernel.org Cleanup the PHY drivers for IPplus devices and add PHY counters and MDIX support for the IP101A/G. Patch 5 adds a model detection based on the behavior of the PHY. Unfortunately, the IP101A shares the PHY ID with the IP101G. But the latter provides more features. Try to detect the newer model by accessing the page selection register. If it is writeable, it is assumed, that it is a IP101G. With this detection in place, we can now access registers >= 16 in a correct way on the IP101G; that is by first selecting the correct page. This might previouly worked, because no one ever set another active page before booting linux. The last two patches add the new features. Michael Walle (9): net: phy: icplus: use PHY_ID_MATCH_MODEL() macro net: phy: icplus: use PHY_ID_MATCH_EXACT() for IP101A/G net: phy: icplus: drop address operator for functions net: phy: icplus: use the .soft_reset() of the phy-core net: phy: icplus: split IP101A/G driver net: phy: icplus: don't set APS_EN bit on IP101G net: phy: icplus: fix paged register access net: phy: icplus: add PHY counter for IP101G net: phy: icplus: add MDI/MDIX support for IP101A/G drivers/net/phy/icplus.c | 378 ++++++++++++++++++++++++++++++++------- 1 file changed, 318 insertions(+), 60 deletions(-)