| Message ID | 20210530225939.772553-1-olteanv@gmail.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Part 2 of SJA1105 DSA driver preparation for new switch introduction (SJA1110) | expand |
Hello: This series was applied to netdev/net-next.git (refs/heads/master): On Mon, 31 May 2021 01:59:31 +0300 you wrote: > From: Vladimir Oltean <vladimir.oltean@nxp.com> > > This series is a continuation of: > https://patchwork.kernel.org/project/netdevbpf/cover/20210524131421.1030789-1-olteanv@gmail.com/ > > even though it isn't the first time these patches are submitted (they > were part of the group previously called "Add NXP SJA1110 support to the > sja1105 DSA driver"): > https://patchwork.kernel.org/project/netdevbpf/cover/20210526135535.2515123-1-vladimir.oltean@nxp.com/ > > [...] Here is the summary with links: - [v3,net-next,1/8] net: dsa: sja1105: be compatible with "ethernet-ports" OF node name https://git.kernel.org/netdev/net-next/c/15074a361fee - [v3,net-next,2/8] net: dsa: sja1105: allow SGMII PCS configuration to be per port https://git.kernel.org/netdev/net-next/c/84db00f2c043 - [v3,net-next,3/8] net: dsa: sja1105: the 0x1F0000 SGMII "base address" is actually MDIO_MMD_VEND2 https://git.kernel.org/netdev/net-next/c/4c7ee010cf75 - [v3,net-next,4/8] net: dsa: sja1105: cache the phy-mode port property https://git.kernel.org/netdev/net-next/c/bf4edf4afb87 - [v3,net-next,5/8] net: dsa: sja1105: add a PHY interface type compatibility matrix https://git.kernel.org/netdev/net-next/c/91a050782cbf - [v3,net-next,6/8] net: dsa: sja1105: add a translation table for port speeds https://git.kernel.org/netdev/net-next/c/41fed17fdbe5 - [v3,net-next,7/8] net: dsa: sja1105: always keep RGMII ports in the MAC role https://git.kernel.org/netdev/net-next/c/f41fad3cb8b7 - [v3,net-next,8/8] net: dsa: sja1105: some table entries are always present when read dynamically https://git.kernel.org/netdev/net-next/c/96c85f51f123 You are awesome, thank you! -- Deet-doot-dot, I am a bot. https://korg.docs.kernel.org/patchwork/pwbot.html
From: Vladimir Oltean <vladimir.oltean@nxp.com> This series is a continuation of: https://patchwork.kernel.org/project/netdevbpf/cover/20210524131421.1030789-1-olteanv@gmail.com/ even though it isn't the first time these patches are submitted (they were part of the group previously called "Add NXP SJA1110 support to the sja1105 DSA driver"): https://patchwork.kernel.org/project/netdevbpf/cover/20210526135535.2515123-1-vladimir.oltean@nxp.com/ but I broke that up again since these patches are already reviewed, for the most part. There are no changes compared to v2 and v1. This series of patches contains: - an adaptation of the driver to the new "ethernet-ports" OF node name - an adaptation of the driver to support more than 1 SGMII port - a generalization of the supported phy_interface_t values per port - an adaptation to encode SPEED_10, SPEED_100, SPEED_1000 into the hardware registers differently depending on switch revision - a consolidation of the PHY interface type used for RGMII and another one for the API exposed for sja1105_dynamic_config_read() Cc: Russell King <linux@armlinux.org.uk> Cc: Heiner Kallweit <hkallweit1@gmail.com> Vladimir Oltean (8): net: dsa: sja1105: be compatible with "ethernet-ports" OF node name net: dsa: sja1105: allow SGMII PCS configuration to be per port net: dsa: sja1105: the 0x1F0000 SGMII "base address" is actually MDIO_MMD_VEND2 net: dsa: sja1105: cache the phy-mode port property net: dsa: sja1105: add a PHY interface type compatibility matrix net: dsa: sja1105: add a translation table for port speeds net: dsa: sja1105: always keep RGMII ports in the MAC role net: dsa: sja1105: some table entries are always present when read dynamically drivers/net/dsa/sja1105/sja1105.h | 24 +- drivers/net/dsa/sja1105/sja1105_clocking.c | 29 +-- .../net/dsa/sja1105/sja1105_dynamic_config.c | 15 +- drivers/net/dsa/sja1105/sja1105_main.c | 207 ++++++++++-------- drivers/net/dsa/sja1105/sja1105_spi.c | 63 +++++- 5 files changed, 206 insertions(+), 132 deletions(-)