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[0/1] Possible Issue Setting the Delay Flags in the Marvell Net PHY Driver

Message ID 20210628192826.1855132-1-kurt@x64architecture.com (mailing list archive)
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Series Possible Issue Setting the Delay Flags in the Marvell Net PHY Driver | expand

Message

Kurt Cancemi June 28, 2021, 7:28 p.m. UTC
Hi,

I believe there is an issue setting the RX and TX delay flags in the Marvell
net PHY driver. This patch fixes the issue for me but I am not convinced that
this is the right way to fix the issue or that this patch will not cause side
effects for other models. Feedback and comments are greatly appreciated.

Backstory:

I have been troubleshooting getting ethernet to work on a board based off of
the NXP T2080RDB (with DPAA ethernet). It has a Marvell 88E1510 PHY chip.
When attempting to use ping to verify that the ethernet was working I was
only getting RX and TX errors. Upon further debugging I discovered that the
RX and TX delay flags were not being set.

I believe there is an issue because of the following:

* The DPAA memac driver correctly reports that the device tree ethernet
  "phy-connection-type" is set to "rgmii-id" and the of_get_phy_mode()
  function correctly returns 0x8 "PHY_INTERFACE_MODE_RGMII_ID"

* A similar fix for this same issue was incorporated into U-Boot back in 2018:
  https://github.com/u-boot/u-boot/commit/431be621c6cbc72efd1d45fa36686a682cbb470a

* The ethernet works with the attached patch.

Kurt

Kurt Cancemi (1):
  net: phy: marvell: Fixed handing of delays with plain RGMII interface

 drivers/net/phy/marvell.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)