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Robert Hancock (7): net: axienet: Reset core before accessing MAC and wait for core ready net: axienet: add missing memory barriers net: axienet: limit minimum TX ring size net: axienet: Fix TX ring slot available check net: axienet: fix number of TX ring slots for available check net: axienet: fix for TX busy handling net: axienet: increase default TX ring size to 128 .../net/ethernet/xilinx/xilinx_axienet_main.c | 134 +++++++++++------- 1 file changed, 83 insertions(+), 51 deletions(-)