From patchwork Mon Oct 2 10:46:10 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?q?Marek_Beh=C3=BAn?= X-Patchwork-Id: 13405809 Received: from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org [10.30.226.201]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 93C631C02 for ; Mon, 2 Oct 2023 10:46:17 +0000 (UTC) Received: by smtp.kernel.org (Postfix) with ESMTPSA id E0ABAC433C8; Mon, 2 Oct 2023 10:46:15 +0000 (UTC) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org; s=k20201202; t=1696243577; bh=2Tjv0Ffod7M/rpTQ3694goQOO2G2mn7yh0Za3G/AruQ=; h=From:To:Cc:Subject:Date:From; b=DJ6OIU/Rhjy8XY451E0jFrw6U46RzwhYd0lkkFmmp/0W+EAOKpo8n04u/FPKmYa9y rppKD74H3WUDGXZPcrnRSKzyV/F3lfbxckItOAJGMF48uUkZMPBsvted6nEG1vVFqv 56qgAgO9aYnQ61B3/fTdrd7uD9jC8IP55i2FBPgvSPEJyLWwzGI3cN/kiYvF7kwUua NFEMREV7jdfFNhf7f62m6Tqej/TbZq+wLKLPp49JEn2j+MakA3AmwQnio7jiirFHNJ 4AkQ3ZGCi3QXI4IqM97xBPGx2VYsRZ+dARW0yTGnWAYMysLGXSYW4kKHAql+XYkjxq WeUqceDIVOlug== From: =?utf-8?q?Marek_Beh=C3=BAn?= To: Christian Marangi , "David S. Miller" , Paolo Abeni , netdev@vger.kernel.org Cc: =?utf-8?q?Marek_Beh=C3=BAn?= Subject: [PATCH net 0/2] net: dsa: qca8k: fix qca8k driver for Turris 1.x Date: Mon, 2 Oct 2023 12:46:10 +0200 Message-ID: <20231002104612.21898-1-kabel@kernel.org> X-Mailer: git-send-email 2.41.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Patchwork-Delegate: kuba@kernel.org Hi, this patch series contains two fixes to commits that broke qca8k driver on the Turris 1.x router. The first patch is another fix of qca8k's regmap implementation on big-endian systems. The second patch locks the MDIO bus even when accessing switch internal PHYs via ethernet management frames, since it seems that internally the switch still uses MDIO transfers and these can leak outside of the switch back to the MDIO bus, potentially conflicting with the WAN PHY register accesses. Marek Marek Behún (2): net: dsa: qca8k: fix regmap bulk read/write methods on big endian systems net: dsa: qca8k: fix potential MDIO bus conflict when accessing internal PHYs via management frames drivers/net/dsa/qca/qca8k-8xxx.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-)