From patchwork Wed Jan 10 11:16:46 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suraj Jaiswal X-Patchwork-Id: 13515978 Received: from mx0b-0031df01.pphosted.com (mx0b-0031df01.pphosted.com [205.220.180.131]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id C56D447F6D; Wed, 10 Jan 2024 11:17:40 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=none dis=none) header.from=quicinc.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=quicinc.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=quicinc.com header.i=@quicinc.com header.b="W5BixuMh" Received: from pps.filterd (m0279869.ppops.net [127.0.0.1]) by mx0a-0031df01.pphosted.com (8.17.1.24/8.17.1.24) with ESMTP id 40AA3MIm014798; Wed, 10 Jan 2024 11:17:21 GMT DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=quicinc.com; h= from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding:content-type; s=qcppdkim1; bh=AUUZ/+k d9eZ8WvQBLG6Xq/wv7fzjQ0TDRWKKrOV1w/k=; b=W5BixuMh24U+Ht8GkhL/Q4n wAeNCywPA5X5jAf8LLw3c5efN3ruszbUfRMtO+7Yq7loOa4hHX+LEx+AFi1SKs3+ NsMSzVjjoYvotVk7djj8Ci3tx9x+drtf1jAPolV2GfQCEH8aC35hoGsfvirK3Mm+ rDc99JE7rABL421MRhUyTtKnWsVSFUeqrDAQ8VhvVBm9d8cLErMpCcy6AquBFw+a Go3GCbS5/WZ5VJ/um2NlSxoiwkDWB0cJWcZqfSdHRuo0X92RPAkUUdizZQOXNl1k c7dFgumHWTSHTyJkD1zu5nqZPYpSnjTcW4ctWtWWt/lADHUJJ+l6sOpkF8PxcDg= = Received: from nalasppmta01.qualcomm.com (Global_NAT1.qualcomm.com [129.46.96.20]) by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 3vhs4mg5mq-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 Jan 2024 11:17:21 +0000 (GMT) Received: from nalasex01b.na.qualcomm.com (nalasex01b.na.qualcomm.com [10.47.209.197]) by NALASPPMTA01.qualcomm.com (8.17.1.5/8.17.1.5) with ESMTPS id 40ABHKlK015704 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-GCM-SHA384 bits=256 verify=NOT); Wed, 10 Jan 2024 11:17:20 GMT Received: from hu-jsuraj-hyd.qualcomm.com (10.80.80.8) by nalasex01b.na.qualcomm.com (10.47.209.197) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1118.40; Wed, 10 Jan 2024 03:17:09 -0800 From: Suraj Jaiswal To: , Vinod Koul , Bhupesh Sharma , Andy Gross , Bjorn Andersson , Konrad Dybcio , "David S. Miller" , Eric Dumazet , "Jakub Kicinski" , Rob Herring , "Krzysztof Kozlowski" , Conor Dooley , Alexandre Torgue , "Jose Abreu" , Maxime Coquelin , , , , , , Prasad Sodagudi , Andrew Halaney , Rob Herring CC: Subject: [PATCH net-next v8 0/3] Ethernet DWMAC5 fault IRQ support Date: Wed, 10 Jan 2024 16:46:46 +0530 Message-ID: <20240110111649.2256450-1-quic_jsuraj@quicinc.com> X-Mailer: git-send-email 2.25.1 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: nasanex01b.na.qualcomm.com (10.46.141.250) To nalasex01b.na.qualcomm.com (10.47.209.197) X-QCInternal: smtphost X-Proofpoint-Virus-Version: vendor=nai engine=6200 definitions=5800 signatures=585085 X-Proofpoint-GUID: HRWQ1kAbFVWtEIm18v5odwhp3e59BjvA X-Proofpoint-ORIG-GUID: HRWQ1kAbFVWtEIm18v5odwhp3e59BjvA X-Proofpoint-Virus-Version: vendor=baseguard engine=ICAP:2.0.272,Aquarius:18.0.997,Hydra:6.0.619,FMLib:17.11.176.26 definitions=2023-12-09_02,2023-12-07_01,2023-05-22_02 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 phishscore=0 lowpriorityscore=0 mlxlogscore=851 adultscore=0 impostorscore=0 spamscore=0 clxscore=1011 mlxscore=0 suspectscore=0 bulkscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.19.0-2311290000 definitions=main-2401100092 X-Patchwork-Delegate: kuba@kernel.org From: Suraj Jaiswal Add support to listen Ethernet HW common safery IRQ for correctable and uncorrectable fault. The safety IRQ will be triggered for ECC(error correction code), DPP(data path parity, FSM(finite state machine) error. Changes since v9: - prevent race condition of safety IRQ handling Changes since v8: - Use shared IRQ for sfty - update error message Changes since v7: - Add support of common sfty irq on stmmac_request_irq_multi_msi. - Remove uncecessary blank line. Changes since v6: - use name sfty_irq instead of safety_common_irq. Changes since v5: - Add description of ECC, DPP, FSM Changes since v4: - Fix DT_CHECKER warning - use name safety for the IRQ. Suraj Jaiswal (3): dt-bindings: net: qcom,ethqos: add binding doc for safety IRQ for sa8775p arm64: dts: qcom: sa8775p: enable safety IRQ net: stmmac: Add driver support for DWMAC5 common safety IRQ .../devicetree/bindings/net/qcom,ethqos.yaml | 9 ++-- .../devicetree/bindings/net/snps,dwmac.yaml | 6 ++- arch/arm64/boot/dts/qcom/sa8775p.dtsi | 10 +++-- drivers/net/ethernet/stmicro/stmmac/common.h | 1 + drivers/net/ethernet/stmicro/stmmac/stmmac.h | 3 ++ .../net/ethernet/stmicro/stmmac/stmmac_main.c | 41 ++++++++++++++++++- .../ethernet/stmicro/stmmac/stmmac_platform.c | 8 ++++ 7 files changed, 67 insertions(+), 11 deletions(-)