From patchwork Tue Mar 26 11:06:50 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Diogo Ivo X-Patchwork-Id: 13603921 Received: from mta-64-227.siemens.flowmailer.net (mta-64-227.siemens.flowmailer.net [185.136.64.227]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 4FD153EA90 for ; Tue, 26 Mar 2024 11:07:22 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=none smtp.client-ip=185.136.64.227 ARC-Seal: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711451244; cv=none; b=JP40ZbGxpkKRRCPFnrlSl/SgrS0tQy0c4en0idEZ9OeF+dFNngMQ6eGendRJOLJ44Lani72jUPiOcvd/qEh5Egpl3mq+X4BePaK3jCQnmsSZbC55hA4Dt3grMhdrfLNtqykWfReLQGwmk/CwXZDsx59ZGr7jVqUiqGKFQDgZusk= ARC-Message-Signature: i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1711451244; c=relaxed/simple; bh=AZ9qaaGQLRaLh2erSzhK0546WiFMXsWnmx6StL2v698=; h=From:To:Cc:Subject:Date:Message-ID:MIME-Version; b=Pa6hjo+OtKUA2w2tFKLyaBIYHJl6T482JjQi/E5VQPG0u2aco554pUIKbnFLOqflma5Jof1AGp89Oajyq/K5F7gKQveccdsTHT6yG5a6diBmGPO6U5FX1vvw0/ljrbdgIDSN3nes1pj0P93YuVCYrTW4vCkoaBU9YyigsbTYxoI= ARC-Authentication-Results: i=1; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com; dkim=pass (1024-bit key) header.d=siemens.com header.i=diogo.ivo@siemens.com header.b=N92iqx2L; arc=none smtp.client-ip=185.136.64.227 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=siemens.com Authentication-Results: smtp.subspace.kernel.org; spf=pass smtp.mailfrom=rts-flowmailer.siemens.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (1024-bit key) header.d=siemens.com header.i=diogo.ivo@siemens.com header.b="N92iqx2L" Received: by mta-64-227.siemens.flowmailer.net with ESMTPSA id 20240326110713eedc925fe822512a8e for ; Tue, 26 Mar 2024 12:07:14 +0100 DKIM-Signature: v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; s=fm1; d=siemens.com; i=diogo.ivo@siemens.com; h=Date:From:Subject:To:Message-ID:MIME-Version:Content-Type:Content-Transfer-Encoding:Cc; bh=cEHbLT2jVMdGX6hNOXRPoDNWmYXIjvyLR3rnxVrloAg=; b=N92iqx2LqZPoXm1Vpyonl2lcubItESnxayQkawDeDdznkrF1LMgN1KGunoKE+SKRdqT89i N+2nJW7U0/xy4sGxvklTTeVGxdG6XONeG0tpdNZnAwbVQ6t3S04JH3Cf5Oiry6mSAL3ocFkX N3MOGQIm39qCGeewim3gFDGn81ilo=; From: Diogo Ivo To: danishanwar@ti.com, rogerq@kernel.org, davem@davemloft.net, edumazet@google.com, kuba@kernel.org, pabeni@redhat.com, andrew@lunn.ch, dan.carpenter@linaro.org, jacob.e.keller@intel.com, robh@kernel.org, robh+dt@kernel.org, krzysztof.kozlowski+dt@linaro.org, conor+dt@kernel.org, vigneshr@ti.com, wsa+renesas@sang-engineering.com, hkallweit1@gmail.com, arnd@arndb.de, vladimir.oltean@nxp.com, linux-arm-kernel@lists.infradead.org, netdev@vger.kernel.org, devicetree@vger.kernel.org Cc: Diogo Ivo , jan.kiszka@siemens.com Subject: [PATCH net-next v5 00/10] Support ICSSG-based Ethernet on AM65x SR1.0 devices Date: Tue, 26 Mar 2024 11:06:50 +0000 Message-ID: <20240326110709.26165-1-diogo.ivo@siemens.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-Flowmailer-Platform: Siemens Feedback-ID: 519:519-1320519:519-21489:flowmailer X-Patchwork-Delegate: kuba@kernel.org Hello, This series extends the current ICSSG-based Ethernet driver to support AM65x Silicon Revision 1.0 devices. Notable differences between the Silicon Revisions are that there is no TX core in SR1.0 with this being handled by the firmware, requiring extra DMA channels to manage communication with the firmware (with the firmware being different as well) and in the packet classifier. The motivation behind it is that a significant number of Siemens devices containing SR1.0 silicon have been deployed in the field and need to be supported and updated to newer kernel versions without losing functionality. This series is based on TI's 5.10 SDK [1]. The fourth version of this patch series can be found in [2]. Detailed descriptions of the changes in this series can be found in each commit's message. Both of the problems mentioned in v4 have been addressed by disabling those functionalities, meaning that this driver currently only supports one TX queue and does not support a 100Mbit/s half-duplex connection. The removal of these features has been commented in the appropriate locations in the code. [1]: https://git.ti.com/cgit/ti-linux-kernel/ti-linux-kernel/tree/?h=ti-linux-5.10.y [2]: https://lore.kernel.org/netdev/20240305114045.388893-1-diogo.ivo@siemens.com/ Diogo Ivo (10): dt-bindings: net: Add support for AM65x SR1.0 in ICSSG eth: Move IPv4/IPv6 multicast address bases to their own symbols net: ti: icssg-prueth: Move common functions into a separate file net: ti: icssg-prueth: Add SR1.0-specific configuration bits net: ti: icssg-prueth: Add SR1.0-specific description bits net: ti: icssg-prueth: Adjust IPG configuration for SR1.0 net: ti: icssg-prueth: Adjust the number of TX channels for SR1.0 net: ti: icssg-prueth: Add functions to configure SR1.0 packet classifier net: ti: icssg-prueth: Modify common functions for SR1.0 net: ti: icssg-prueth: Add ICSSG Ethernet driver for AM65x SR1.0 platforms .../bindings/net/ti,icssg-prueth.yaml | 35 +- drivers/net/ethernet/ti/Kconfig | 15 + drivers/net/ethernet/ti/Makefile | 9 + .../net/ethernet/ti/icssg/icssg_classifier.c | 113 +- drivers/net/ethernet/ti/icssg/icssg_common.c | 1221 +++++++++++++++++ drivers/net/ethernet/ti/icssg/icssg_config.c | 14 +- drivers/net/ethernet/ti/icssg/icssg_config.h | 56 + drivers/net/ethernet/ti/icssg/icssg_ethtool.c | 10 + drivers/net/ethernet/ti/icssg/icssg_prueth.c | 1189 +--------------- drivers/net/ethernet/ti/icssg/icssg_prueth.h | 79 +- .../net/ethernet/ti/icssg/icssg_prueth_sr1.c | 1181 ++++++++++++++++ include/linux/etherdevice.h | 12 +- 12 files changed, 2724 insertions(+), 1210 deletions(-) create mode 100644 drivers/net/ethernet/ti/icssg/icssg_common.c create mode 100644 drivers/net/ethernet/ti/icssg/icssg_prueth_sr1.c