| Message ID | 20240419082626.57225-1-c-vankar@ti.com (mailing list archive) |
|---|---|
| Headers | show |
| Series | Enable RX HW timestamp for PTP packets using CPTS FIFO | expand |
On 19/04/24 13:56, Chintan Vankar wrote: > The CPSW offers two mechanisms for communicating packet ingress timestamp > information to the host. > > The first mechanism is via the CPTS Event FIFO which records timestamp > when triggered by certain events. One such event is the reception of an > Ethernet packet with a specified EtherType field. This is used to capture > ingress timestamps for PTP packets. With this mechanism the host must > read the timestamp (from the CPTS FIFO) separately from the packet payload > which is delivered via DMA. > > In the second mechanism of timestamping, CPSW driver enables hardware > timestamping for all received packets by setting the TSTAMP_EN bit in > CPTS_CONTROL register, which directs the CPTS module to timestamp all > received packets, followed by passing timestamp via DMA descriptors. > This mechanism is responsible for triggering errata i2401: > "CPSW: Host Timestamps Cause CPSW Port to Lock up." > > The errata affects all K3 SoCs. Link to errata for AM64x: > https://www.ti.com/lit/er/sprz457h/sprz457h.pdf > > As a workaround we can use first mechanism to timestamp received > packets. > > Series is based on linux-next tagged next-20240419. > > Link to v7: > https://lore.kernel.org/r/20240417120913.3811519-1-c-vankar@ti.com/ > > Changes from v7 to v8: > - Removed empty lines between trailers in [PATCH v7 2/2] as suggested > by Jakub. > Is it possible to merge this series if no further comment ? > Chintan Vankar (2): > net: ethernet: ti: am65-cpts: Enable RX HW timestamp for PTP packets > using CPTS FIFO > net: ethernet: ti: am65-cpsw/ethtool: Enable RX HW timestamp only for > PTP packets > > drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 13 ++- > drivers/net/ethernet/ti/am65-cpsw-nuss.c | 51 +++++----- > drivers/net/ethernet/ti/am65-cpts.c | 107 ++++++++++++++------ > drivers/net/ethernet/ti/am65-cpts.h | 11 +- > 4 files changed, 118 insertions(+), 64 deletions(-) >
On Mon, 22 Apr 2024 17:09:41 +0530 Chintan Vankar wrote:
> Is it possible to merge this series if no further comment ?
Perhaps you are blocked by us not merging this, yet.
In that case, to avoid sitting idly, may I politely suggest
reading the Linux kernel process documentation. Especially the part
which explains whether it's polite to ping maintainers (after less
than two work days).
Hello: This series was applied to netdev/net-next.git (main) by Paolo Abeni <pabeni@redhat.com>: On Fri, 19 Apr 2024 13:56:24 +0530 you wrote: > The CPSW offers two mechanisms for communicating packet ingress timestamp > information to the host. > > The first mechanism is via the CPTS Event FIFO which records timestamp > when triggered by certain events. One such event is the reception of an > Ethernet packet with a specified EtherType field. This is used to capture > ingress timestamps for PTP packets. With this mechanism the host must > read the timestamp (from the CPTS FIFO) separately from the packet payload > which is delivered via DMA. > > [...] Here is the summary with links: - [net-next,v8,1/2] net: ethernet: ti: am65-cpts: Enable RX HW timestamp for PTP packets using CPTS FIFO https://git.kernel.org/netdev/net-next/c/c459f606f66d - [net-next,v8,2/2] net: ethernet: ti: am65-cpsw/ethtool: Enable RX HW timestamp only for PTP packets https://git.kernel.org/netdev/net-next/c/c03a6fd39826 You are awesome, thank you!
The CPSW offers two mechanisms for communicating packet ingress timestamp information to the host. The first mechanism is via the CPTS Event FIFO which records timestamp when triggered by certain events. One such event is the reception of an Ethernet packet with a specified EtherType field. This is used to capture ingress timestamps for PTP packets. With this mechanism the host must read the timestamp (from the CPTS FIFO) separately from the packet payload which is delivered via DMA. In the second mechanism of timestamping, CPSW driver enables hardware timestamping for all received packets by setting the TSTAMP_EN bit in CPTS_CONTROL register, which directs the CPTS module to timestamp all received packets, followed by passing timestamp via DMA descriptors. This mechanism is responsible for triggering errata i2401: "CPSW: Host Timestamps Cause CPSW Port to Lock up." The errata affects all K3 SoCs. Link to errata for AM64x: https://www.ti.com/lit/er/sprz457h/sprz457h.pdf As a workaround we can use first mechanism to timestamp received packets. Series is based on linux-next tagged next-20240419. Link to v7: https://lore.kernel.org/r/20240417120913.3811519-1-c-vankar@ti.com/ Changes from v7 to v8: - Removed empty lines between trailers in [PATCH v7 2/2] as suggested by Jakub. Chintan Vankar (2): net: ethernet: ti: am65-cpts: Enable RX HW timestamp for PTP packets using CPTS FIFO net: ethernet: ti: am65-cpsw/ethtool: Enable RX HW timestamp only for PTP packets drivers/net/ethernet/ti/am65-cpsw-ethtool.c | 13 ++- drivers/net/ethernet/ti/am65-cpsw-nuss.c | 51 +++++----- drivers/net/ethernet/ti/am65-cpts.c | 107 ++++++++++++++------ drivers/net/ethernet/ti/am65-cpts.h | 11 +- 4 files changed, 118 insertions(+), 64 deletions(-)