Message ID | 20240829080935.371281-1-schalla@marvell.com (mailing list archive) |
---|---|
Headers | show |
Series | octeontx2-af: update CPT block for CN10KB and CN10KA B0 | expand |
Hello: This series was applied to netdev/net-next.git (main) by David S. Miller <davem@davemloft.net>: On Thu, 29 Aug 2024 13:39:32 +0530 you wrote: > This commit addresses two key updates for the CN10KB and CN10KA B0: > > 1. The number of FLT interrupt vectors has been reduced to 2 on CN10KB. > The code is updated to reflect this change across the CN10K series. > 2. The maximum CPT credits that RX can use are now configurable through > a hardware CSR on CN10KA B0. This patch sets the default value to optimize > peak performance, aligning it with other chip versions. > > [...] Here is the summary with links: - [net-next,v2,1/3] octeontx2-af: use dynamic interrupt vectors for CN10K https://git.kernel.org/netdev/net-next/c/4ebe78e15b95 - [net-next,v2,2/3] octeontx2-af: avoid RXC register access for CN10KB https://git.kernel.org/netdev/net-next/c/1652623291c5 - [net-next,v2,3/3] octeontx2-af: configure default CPT credits for CN10KA B0 https://git.kernel.org/netdev/net-next/c/5da8de8cb3e3 You are awesome, thank you!