From patchwork Sun Oct 13 06:45:25 2024 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Tariq Toukan X-Patchwork-Id: 13833687 Received: from NAM12-MW2-obe.outbound.protection.outlook.com (mail-mw2nam12on2083.outbound.protection.outlook.com [40.107.244.83]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by smtp.subspace.kernel.org (Postfix) with ESMTPS id 3F66B77104 for ; Sun, 13 Oct 2024 06:46:30 +0000 (UTC) Authentication-Results: smtp.subspace.kernel.org; arc=fail smtp.client-ip=40.107.244.83 ARC-Seal: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728801992; cv=fail; b=PIueTZZwfiuZN80aZQn15v2p89hv8pNnmTxdu+RGLp/SElO9KhmaiSb5my0ek2sEaGOP8s1WMpoycvFXNMXAxYOUQPZh5mJWcQDFOxFKBmOW+7Bwq8CrrRHJgZLR5Ececc92NBwWrrWlZhkI1mu1sqZcRDWUyjKhZOQry2H5f38= ARC-Message-Signature: i=2; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116; t=1728801992; c=relaxed/simple; bh=RE2R1SIKZdPxRaatf4+t0scqrf+9XOboc/p7fBckThs=; h=From:To:CC:Subject:Date:Message-ID:MIME-Version:Content-Type; b=p3uDJlZL/asy4SDLIxA1FLN0pP6O/DUP4xIbCoknALncm5twq/sd2VUPXDzWQM7lFJ3BxAQ7FlCgqaNlb977SSIkFQUhy0/HxkDDv7ZvlGwhd2atqEF1msKPWWBftPNjhi3egoyo6R7d57RBr4B9i0q/B3R0Rk6Xz958xGiOmWU= ARC-Authentication-Results: i=2; smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com; spf=fail smtp.mailfrom=nvidia.com; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b=h8yUx8in; arc=fail smtp.client-ip=40.107.244.83 Authentication-Results: smtp.subspace.kernel.org; dmarc=pass (p=reject dis=none) header.from=nvidia.com Authentication-Results: smtp.subspace.kernel.org; spf=fail smtp.mailfrom=nvidia.com Authentication-Results: smtp.subspace.kernel.org; dkim=pass (2048-bit key) header.d=Nvidia.com header.i=@Nvidia.com header.b="h8yUx8in" ARC-Seal: i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none; b=VpEW8Ps+Bg2wXSwFT/d1YHAG3V2kneXX20efqySShmLdc4RoTXI5sBOKTKzTQ5gUsYVdHU7UADWYwe+K6YSEK4xHRdJQTqEg7dspVQ7Sikje1DaezZ+Zdv4c0CPw59Bna5lk4XOarJkyfGBNzxYWLvklpV1C5zyPn/RYmHQwgIvJTAGq/o7n1sYBYSxYGtQxd431MeGgE0CK9PRlX9Vrb6Wqo9mq5cA/zzR1qH/wlWpQ80+eTAAy5UuQRlv5nzpap79L0eNwFLvCvy3tAsMT1bUJK1xt2oO/2juvM9q8RimLe5asiR3ONKraBecy7xpLag4M4RYhtHakzqcK0QAY+w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com; s=arcselector10001; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1; bh=OuKZODEEGIc5U60mhZLA9sZu3RuIualSa6OJItIXDm4=; b=HBc1LGQC2/pseJE9QDgeIS5t9O9XHavLNsOP6tTCaQr4NDdbnCxdV1Mv0IAQraMNkz2hPqfLFRbuFXWcYGnwIjGgcw9Jnd10pj6oFuIfwQ4OPBo5lcgpDnrEJMo7D//zGR/sS9xq6iiQLI7aA96v1D/JXg/Aub3SpUsXnuQ9wA5VlngmCwoyx7EedgFtEd2BNhIGAdyF48GYi1IlhFWU9/YYBABrVVFOUUFp95C/CuwJQ8QVsdqIV6dnGkO1OFbLrw72Z8UnYyuOGyuHtuBO1OqQg/Z+TeA47lRM7TkhTj99B5zY3IeusMni1P6sp1kCFASuRiTMJBa7yhYHON6e+A== ARC-Authentication-Results: i=1; mx.microsoft.com 1; spf=pass (sender ip is 216.228.118.233) smtp.rcpttodomain=davemloft.net smtp.mailfrom=nvidia.com; dmarc=pass (p=reject sp=reject pct=100) action=none header.from=nvidia.com; dkim=none (message not signed); arc=none (0) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=Nvidia.com; s=selector2; h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck; bh=OuKZODEEGIc5U60mhZLA9sZu3RuIualSa6OJItIXDm4=; b=h8yUx8inu70fhqgPHsNnggAEnP3o8J3qZfpN+4PNnsBd67c9qJX7x3I/bpd3wh5JS8nGnxTpQWmgtiAtRlFbnAHQrUpgl+ZejBjR59osC7U+mVgaljQx+5weQsug4uB6V8cnW2lsuOMQNZxdDi2Xiz+bx5HrCKAsoFXmb/1FUdGNWzTzH/Bz7ACTcYNs4REKTk1C+KI+KWpM9JNRYi415uCkYV6czaEpYA53jFwPp7aF8XlykMvgQC3S++DRgl6VP/RMNvViG53VvFLJrW4rhA107/nDUFpcrjyXoLVxghwEpX7wzlcuQc+QTCG0V6pbkyrNgki/72qq4L5nqGxjgw== Received: from CH3P221CA0025.NAMP221.PROD.OUTLOOK.COM (2603:10b6:610:1e7::20) by CH3PR12MB7524.namprd12.prod.outlook.com (2603:10b6:610:146::19) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.22; Sun, 13 Oct 2024 06:46:24 +0000 Received: from CH1PEPF0000AD82.namprd04.prod.outlook.com (2603:10b6:610:1e7:cafe::3b) by CH3P221CA0025.outlook.office365.com (2603:10b6:610:1e7::20) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.24 via Frontend Transport; Sun, 13 Oct 2024 06:46:24 +0000 X-MS-Exchange-Authentication-Results: spf=pass (sender IP is 216.228.118.233) smtp.mailfrom=nvidia.com; dkim=none (message not signed) header.d=none;dmarc=pass action=none header.from=nvidia.com; Received-SPF: Pass (protection.outlook.com: domain of nvidia.com designates 216.228.118.233 as permitted sender) receiver=protection.outlook.com; client-ip=216.228.118.233; helo=mail.nvidia.com; pr=C Received: from mail.nvidia.com (216.228.118.233) by CH1PEPF0000AD82.mail.protection.outlook.com (10.167.244.91) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.8048.13 via Frontend Transport; Sun, 13 Oct 2024 06:46:23 +0000 Received: from drhqmail203.nvidia.com (10.126.190.182) by mail.nvidia.com (10.127.129.6) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 12 Oct 2024 23:46:15 -0700 Received: from drhqmail202.nvidia.com (10.126.190.181) by drhqmail203.nvidia.com (10.126.190.182) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Sat, 12 Oct 2024 23:46:15 -0700 Received: from vdi.nvidia.com (10.127.8.10) by mail.nvidia.com (10.126.190.181) with Microsoft SMTP Server id 15.2.1544.4 via Frontend Transport; Sat, 12 Oct 2024 23:46:12 -0700 From: Tariq Toukan To: "David S. Miller" , Jakub Kicinski , Paolo Abeni , Eric Dumazet CC: , Saeed Mahameed , Gal Pressman , Leon Romanovsky , , , Tariq Toukan Subject: [PATCH net-next 00/15] net/mlx5: Refactor esw QoS to support generalized operations Date: Sun, 13 Oct 2024 09:45:25 +0300 Message-ID: <20241013064540.170722-1-tariqt@nvidia.com> X-Mailer: git-send-email 2.44.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-NV-OnPremToCloud: ExternallySecured X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CH1PEPF0000AD82:EE_|CH3PR12MB7524:EE_ X-MS-Office365-Filtering-Correlation-Id: d0124452-b153-4cfa-8ed2-08dceb52c0c7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|82310400026|36860700013|376014|1800799024; X-Microsoft-Antispam-Message-Info: =?utf-8?q?LyMUx7LRPKN0OH3SaDnfSYRRyvZRnPT?= =?utf-8?q?muSoho1tc7kBDqv9mQIWE2z47Mv3qrPlaqS8PFJipS2GiW37mPWIXme0eXjjJObjT?= =?utf-8?q?VH73o6eqWNApJs97ikwI+ybJuOPhkkgHxKDVYZIjLmTs+Zb6/XGWc+KoUcCcQN1oJ?= =?utf-8?q?ej1QwNk/Cze670d3o8koiGFXLj4nMWVaI9YZelxqTCg78t2uQG8R0R+CFCww9YGJj?= =?utf-8?q?CQaBsy1TMRUv02E6MVp8Ll2mmdRb65oKqu3fCk49rX3teKax13LBIJIMMlofjV6fk?= =?utf-8?q?Uw0DLJ1ZcYduIWnWe7WNf4b554enHJmbk0wj0VBDbH9FYEiuP/oj1KnbP674ybfQY?= =?utf-8?q?qXbU7ai2Y7Z/PKfzsjX9ejhWMeiLpI6F5AkCPilrSE5Qex+OG3M3g0pwsX+24RAWm?= =?utf-8?q?k/NHDK69GS4SQynrSmLl2SOm+vGY5+b+1pIehWL610RgwF2tThtcW6iHBUFVq2XQB?= =?utf-8?q?EkFk2VSrnxJTS6RCAh4cQ6FLYgL9dXNVfIfUCmFO7mkuaBar5IknpJT57MeC2nD/g?= =?utf-8?q?w09yrJlXM9S6XviwZFewZw/5T2dTqyxQUd39jvZnAFD62s1hql+JDKKgeZCBihBet?= =?utf-8?q?lkcDP/KZLNx+BcEgnrhNerXjxyGSvalJLeVF5UB7ERmsMGn7FWfhptbsROC15Diyp?= =?utf-8?q?DBTBBdKQFy9NUcIHQqQSwbJa+ikO/k+jv90TDwT+CKSsgzRgB9Gc+hk4zw70Nn48i?= =?utf-8?q?TWhtaxUEsXQESc85hb/8CvJc8tZ6IaHCpA9no+IhhRd5OYZKwibN5+kV6XScLVaY7?= =?utf-8?q?q9LwSzR34k9gLs2CSqUrAIxLgNyf1wL55hNPTALwlNrL7tQXMs8GE+7806FpuB3GE?= =?utf-8?q?9tS9DG4AA4bVOeBZWigceIY5f3TCek31mIuIe9NuXE3NtfzJN4FJd1zE5uwZK8t4G?= =?utf-8?q?je/nyHUWqent0eYWrS5hwOQ+ah70qVjr9YU/5ftkVzkkOOJmyvlXjfg/QgRC83zFq?= =?utf-8?q?ni4UmBNTpn/4ZADWeuLCsvavuc4WwM1HvdGXL1TPfZiw5YmZxVnr+ipz7ntzsvuEJ?= =?utf-8?q?Mui81GR8oRRgqGNc+aQDb25SEx0FHdTfRhbtGqfWksJloMBVLusQLpoL6t7ygJ4JB?= =?utf-8?q?WmMR2g8mBgn+a5wxvIm3jS8/jWjQeBvQGvyZ09rAgwOOpcx1Qj0rhz3+PGXFfMVvS?= =?utf-8?q?cqrxcO6lqLxaTC9Ixhc8ERQRGmohgrOPTbwV4n6vSuhrViaMPrQjZA/Cf4HLKU5l6?= =?utf-8?q?h/7lBe9o/qA8z+VkDa6nOUEJp9NmFohJuolDPngwhRIc3wmg+SIhSqGN6FxgQ71e2?= =?utf-8?q?FW7edXcGcMpwq7LXIPVcqI/6TqEAB1GKXXwKfT1SQol2vcPql6bDD7vJcP8SQx8H2?= =?utf-8?q?ph46KyVhm9K/?= X-Forefront-Antispam-Report: CIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(82310400026)(36860700013)(376014)(1800799024);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 13 Oct 2024 06:46:23.2354 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: d0124452-b153-4cfa-8ed2-08dceb52c0c7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CH1PEPF0000AD82.namprd04.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CH3PR12MB7524 X-Patchwork-Delegate: kuba@kernel.org Hi, This patch series from the team to mlx5 core driver consists of one main QoS part followed by small misc patches. This main part (patches 1 to 11) by Carolina refactors the QoS handling to generalize operations on scheduling groups and vports. These changes are necessary to support new features that will extend group functionality, introduce new group types, and support deeper hierarchies. Additionally, this refactor updates the terminology from "group" to "node" to better reflect the hardware’s rate hierarchy and its use of scheduling element nodes. Simplify group scheduling element creation: - net/mlx5: Refactor QoS group scheduling element creation Refactor to support generalized operations for QoS: - net/mlx5: Introduce node type to rate group structure - net/mlx5: Add parent group support in rate group structure - net/mlx5: Restrict domain list insertion to root TSAR ancestors - net/mlx5: Rename vport QoS group reference to parent - net/mlx5: Introduce node struct and rename group terminology to node - net/mlx5: Refactor vport scheduling element creation function - net/mlx5: Refactor vport QoS to use scheduling node structure - net/mlx5: Remove vport QoS enabled flag Support generalized operations for QoS elements: - net/mlx5: Simplify QoS scheduling element configuration - net/mlx5: Generalize QoS operations for nodes and vports On top, patch 12 by Moshe handles FW request to move to drop mode. In patch 13, Benjamin Poirier removes an empty eswitch flow table when not used, which improves packet processing performance. Patches 14 and 15 by Moshe are small field renamings as preparation for future fields addition to these structures. Series generated against: commit c531f2269a53 ("net: bcmasp: enable SW timestamping") Regards, Tariq Benjamin Poirier (1): net/mlx5: Only create VEPA flow table when in VEPA mode Carolina Jubran (11): net/mlx5: Refactor QoS group scheduling element creation net/mlx5: Introduce node type to rate group structure net/mlx5: Add parent group support in rate group structure net/mlx5: Restrict domain list insertion to root TSAR ancestors net/mlx5: Rename vport QoS group reference to parent net/mlx5: Introduce node struct and rename group terminology to node net/mlx5: Refactor vport scheduling element creation function net/mlx5: Refactor vport QoS to use scheduling node structure net/mlx5: Remove vport QoS enabled flag net/mlx5: Simplify QoS scheduling element configuration net/mlx5: Generalize QoS operations for nodes and vports Moshe Shemesh (3): net/mlx5: Add sync reset drop mode support net/mlx5: fs, rename packet reformat struct member action net/mlx5: fs, rename modify header struct member action .../mellanox/mlx5/core/en/tc/ct_fs_smfs.c | 4 +- .../mellanox/mlx5/core/esw/devlink_port.c | 2 +- .../mlx5/core/esw/diag/qos_tracepoint.h | 53 +- .../ethernet/mellanox/mlx5/core/esw/legacy.c | 27 +- .../net/ethernet/mellanox/mlx5/core/esw/qos.c | 661 +++++++++--------- .../net/ethernet/mellanox/mlx5/core/esw/qos.h | 3 + .../net/ethernet/mellanox/mlx5/core/eswitch.c | 2 + .../net/ethernet/mellanox/mlx5/core/eswitch.h | 25 +- .../net/ethernet/mellanox/mlx5/core/fs_core.h | 4 +- .../ethernet/mellanox/mlx5/core/fw_reset.c | 9 +- .../mellanox/mlx5/core/steering/fs_dr.c | 35 +- 11 files changed, 430 insertions(+), 395 deletions(-)