Message ID | 20241119081053.4175940-1-ciprianmarian.costea@oss.nxp.com (mailing list archive) |
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Miller" <davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley <conor+dt@kernel.org> Cc: linux-can@vger.kernel.org, netdev@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, imx@lists.linux.dev, NXP Linux Team <s32@nxp.com>, Christophe Lizzi <clizzi@redhat.com>, Alberto Ruiz <aruizrui@redhat.com>, Enric Balletbo <eballetb@redhat.com>, Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> Subject: [PATCH 0/3] add FlexCAN support for S32G2/S32G3 SoCs Date: Tue, 19 Nov 2024 10:10:50 +0200 Message-ID: <20241119081053.4175940-1-ciprianmarian.costea@oss.nxp.com> X-Mailer: git-send-email 2.45.2 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-ClientProxiedBy: AM4PR05CA0002.eurprd05.prod.outlook.com (2603:10a6:205::15) To DU0PR04MB9251.eurprd04.prod.outlook.com (2603:10a6:10:352::15) Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: <netdev.vger.kernel.org> List-Subscribe: <mailto:netdev+subscribe@vger.kernel.org> List-Unsubscribe: <mailto:netdev+unsubscribe@vger.kernel.org> MIME-Version: 1.0 X-MS-Exchange-MessageSentRepresentingType: 1 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: DU0PR04MB9251:EE_|PAXPR04MB9058:EE_ X-MS-Office365-Filtering-Correlation-Id: d0b98e7f-d435-4cef-a0ac-08dd0871b251 X-MS-Exchange-SharedMailbox-RoutingAgent-Processed: True X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|7416014|1800799024|376014|366016|921020; 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add FlexCAN support for S32G2/S32G3 SoCs
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From: Ciprian Marian Costea <ciprianmarian.costea@oss.nxp.com> S32G2 and S32G3 SoCs share the FlexCAN module with i.MX SoCs, with some hardware integration particularities. Main difference covered by this patchset relates to interrupt management. On S32G2/S32G3 SoC, there are separate interrupts for state change, bus errors, MBs 0-7 and MBs 8-127 respectively. Ciprian Marian Costea (3): dt-bindings: can: fsl,flexcan: add S32G2/S32G3 SoC support can: flexcan: add NXP S32G2/S32G3 SoC support can: flexcan: handle S32G2/S32G3 separate interrupt lines .../bindings/net/can/fsl,flexcan.yaml | 25 +++++++++++++-- drivers/net/can/flexcan/flexcan-core.c | 31 +++++++++++++++++++ drivers/net/can/flexcan/flexcan.h | 3 ++ 3 files changed, 56 insertions(+), 3 deletions(-)