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Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , "Amit Cohen" , Subject: [PATCH net-next 0/3] mlxsw: CFF flood mode: NVE underlay configuration Date: Thu, 14 Dec 2023 14:19:04 +0100 Message-ID: X-Mailer: git-send-email 2.41.0 Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: CO1PEPF000042AA:EE_|IA1PR12MB8517:EE_ X-MS-Office365-Filtering-Correlation-Id: 660db006-def9-4583-b46c-08dbfca754b7 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: bNmyKekVhkXdlvXA3W/2T26ynZypMtDFsdUcClyotRklLweI3FQzmJp7VfrvhDVXFyRqkAYICRYDm+PmufHeOnhxLKRPEAEydDQmjbxnXXVJgpfOJjNI69E1XXiRfyn/XhdVRAj9M0q/8pKRpyxxilvVzCOpJRPZgiSw5kiTwR9keZDUhmsQGCCrD+xi6BOMlrbNbzUbywWcEv1H3TCp/7KeZI57yovl26mrEs15jFp6aKjd9pKnkfS6fIZVglo4ofgtvJ0H0K3suGixDQpzZ/AvvYhMnOB/xFdbYdlXny4pdwC/flpFfjq6Gr3xn7EQsc6C6rmHK4X5txPdydlXwQ0dfe9hRxTTYlZDRGKcVGOd6rDCU96LSX/DtmslCXv1P49gspj3xrstM2XXBaadRhsErztjgl5RSswmmLWv09+MO6/KrmhnmTPOABhxCd2EWYL1CakAsz4+ga36J8t0neoMcDyPvX8pJIe4tCPGGXMHp6mjK5KomDv6qoirPfTNkrojpdzEdCcav9Oq1mXhMwnUCMnAGAdmQbmncXppHKjv686CGqkek/O1X/WdViX7zvIadzLo6eS/OaU64tbPco4q/emKvFYydRkDFzK+oKxfkoYAIoFX/DHTb+cnb0UtXVo5jOBhxCN3IpRzqXJoHj6XFozokcXS1EKrdij6atmA9Ggfv+o7Woo/kd/0NQy3G4Bq1Kz9K4vke0BJPFC/froe+AwXFuyNl6JUOx+wqLat1J13l0XNcOu5l7z4mErlKhpuDcJFSeyVY2Mz0xfVBxv2gu/Ax7t7US5czUJSCUk= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230031)(4636009)(376002)(136003)(396003)(346002)(39860400002)(230922051799003)(82310400011)(451199024)(64100799003)(186009)(1800799012)(46966006)(40470700004)(36840700001)(36756003)(41300700001)(47076005)(40460700003)(83380400001)(82740400003)(356005)(36860700001)(7636003)(16526019)(316002)(54906003)(5660300002)(26005)(107886003)(86362001)(8936002)(4326008)(2616005)(40480700001)(478600001)(966005)(2906002)(426003)(8676002)(336012)(6666004)(110136005)(70586007)(70206006);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 14 Dec 2023 13:19:41.3183 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 660db006-def9-4583-b46c-08dbfca754b7 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: CO1PEPF000042AA.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: IA1PR12MB8517 X-Patchwork-Delegate: kuba@kernel.org Recently, support for CFF flood mode (for Compressed FID Flooding) was added to the mlxsw driver. The most recent patchset has a detailed coverage of what CFF is and what has changed and how: https://lore.kernel.org/netdev/cover.1701183891.git.petrm@nvidia.com/ In CFF flood mode, each FID allocates a handful (in our implementation two or three) consecutive PGT entries. One entry holds the flood vector for unknown-UC traffic, one for MC, one for BC. To determine how to look up flood vectors, the CFF flood mode uses a concept of flood profiles, which are IDs that reference mappings from traffic types to offsets. In the case of CFF flood mode, the offset in question is applied to the PGT address configured at a FID. The same mechanism is used by NVE underlay for flooding. Again the profile ID and the traffic type determine the offset to apply, this time to KVD address used to look up flooding entries. Since mlxsw configures NVE underlay flood the same regardless of traffic type, only one offset was ever needed: the zero, which is the default, and thus no explicit configuration was needed. Now that CFF uses profiles as well, it would be better to configure the profile used by NVE explicitly, to make the configuration visible in the source code. In this patchset, add the register support (in patch #1), add a new traffic type to refer to "any traffic at all" (in patch #2) and finally configure the NVE profile explicitly for FIDs (in patch #3). So far, the implicitly configured flood profile was the ID 0. With this patchset, it changes to 3, leaving the 0 free to allow us to spot missed configuration. Petr Machata (3): mlxsw: reg: Add nve_flood_prf_id field to SFMR mlxsw: spectrum_fid: Add an "any" packet type mlxsw: spectrum_fid: Set NVE flood profile as part of FID configuration drivers/net/ethernet/mellanox/mlxsw/reg.h | 9 ++++++ .../net/ethernet/mellanox/mlxsw/spectrum.h | 2 ++ .../ethernet/mellanox/mlxsw/spectrum_fid.c | 29 +++++++++++++++++++ 3 files changed, 40 insertions(+)