Message ID | cover.1714134205.git.petrm@nvidia.com (mailing list archive) |
---|---|
Headers | show |
Series | mlxsw: Improve events processing performance | expand |
Hello: This series was applied to netdev/net-next.git (main) by David S. Miller <davem@davemloft.net>: On Fri, 26 Apr 2024 14:42:21 +0200 you wrote: > Amit Cohen writes: > > Spectrum ASICs only support a single interrupt, it means that all the > events are handled by one IRQ (interrupt request) handler. > > Currently, we schedule a tasklet to handle events in EQ, then we also use > tasklet for CQ, SDQ and RDQ. Tasklet runs in softIRQ (software IRQ) > context, and will be run on the same CPU which scheduled it. It means that > today we have one CPU which handles all the packets (both network packets > and EMADs) from hardware. > > [...] Here is the summary with links: - [net-next,1/5] mlxsw: pci: Handle up to 64 Rx completions in tasklet https://git.kernel.org/netdev/net-next/c/e28d8aba4381 - [net-next,2/5] mlxsw: pci: Ring RDQ and CQ doorbells once per several completions https://git.kernel.org/netdev/net-next/c/6b3d015cdb2a - [net-next,3/5] mlxsw: pci: Initialize dummy net devices for NAPI https://git.kernel.org/netdev/net-next/c/5d01ed2e9708 - [net-next,4/5] mlxsw: pci: Reorganize 'mlxsw_pci_queue' structure https://git.kernel.org/netdev/net-next/c/c0d9267873bc - [net-next,5/5] mlxsw: pci: Use NAPI for event processing (no matching commit) You are awesome, thank you!