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Thu, 18 Apr 2024 06:48:37 -0700 Received: from localhost.localdomain (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.4; Thu, 18 Apr 2024 06:48:33 -0700 From: Petr Machata To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , CC: Ido Schimmel , Petr Machata , , Simon Horman , Tim 'mithro' Ansell Subject: [PATCH net v2 2/3] mlxsw: core_env: Fix driver initialization with old firmware Date: Thu, 18 Apr 2024 15:46:07 +0200 Message-ID: <0afa8b2e8bac178f5f88211344429176dcc72281.1713446092.git.petrm@nvidia.com> X-Mailer: git-send-email 2.44.0 In-Reply-To: References: Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail202.nvidia.com (10.129.68.7) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: BN2PEPF0000449E:EE_|BL1PR12MB5851:EE_ X-MS-Office365-Filtering-Correlation-Id: fe50a6e0-e11d-4063-6e46-08dc5fae47f0 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: pLwOIyBAch86oyI+oADUKuDOkXfRiGQ3bSQWd8gscvpw5BjzSBSfNBUx+4qES7/kmqYfyMedJRpTGwsn6uRrhWc4mifpSNSgs31byPkxTNLpKAAdZuMTY+X0Xmy26jrnKXrX21l+4NRfc8Q7TBH2TEKRaIC8887mR9RlB5py5bF38O1shfR60eTM9S0jXPQ+IXH7ioKEGqGhgZBO//CoYy9jboID9BRlLlDEdql9Y3OSzEtOyx7dYNjfOiGV767HSftV0xnGCeKfddzqf+CKnXqOGo78WsCvBTAPe6UJ5QI/aj5OFSW8J7tDXGyW83+gUiXRrlBjZuYvr1swSM2/FSAH6RNoatEqJEq2Fvbo+TpUmpAIyrxMjeJ4XRWEwTCMg0I9mAhMlR4qHeRCiii+DQU5g+L4VmcgA+Y9xf3bX9AcVZ2zMW3ev89b1sOPQJj+gPpfvEktXR618+Tm3QElgPuoQ0ruX5QMmmgqXvm5zWQHxdWmSXkgtNleGfFRbGXTd1GEMqj2evHgkri3tok+RSlTlpJU/O5UIEHXJ/BE8FTbK2gnN+R30pB+bqeyNQaMBkbknUz+lWnLNCzv/q6YhwRqM7eJKjGBjOZ2ASs2SL1rvNoaKdoce11iFZL9uTjspZt8k+G7B09jyWb0LD8yKOq6+pdFmjGtBrzQWTlmHKHPMbDfqYhriQeG9JSAIeDvkcUeEsh/4ZhxhgMMW94U6WI8vjY2+J1+ahr063/W+aJnRCzrjAYJPgsYGq4AQTW2 X-Forefront-Antispam-Report: CIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230031)(82310400014)(376005)(36860700004)(1800799015);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 18 Apr 2024 13:48:51.3623 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: fe50a6e0-e11d-4063-6e46-08dc5fae47f0 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: BN2PEPF0000449E.namprd02.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL1PR12MB5851 X-Patchwork-Delegate: kuba@kernel.org From: Ido Schimmel The driver queries the Management Capabilities Mask (MCAM) register during initialization to understand if it can read up to 128 bytes from transceiver modules. However, not all firmware versions support this register, leading to the driver failing to load. Fix by treating an error in the register query as an indication that the feature is not supported. Fixes: 1f4aea1f72da ("mlxsw: core_env: Read transceiver module EEPROM in 128 bytes chunks") Cc: Simon Horman Reported-by: Tim 'mithro' Ansell Signed-off-by: Ido Schimmel Reviewed-by: Petr Machata Signed-off-by: Petr Machata Reviewed-by: Simon Horman --- Notes: v2: - Make mlxsw_env_max_module_eeprom_len_query() void .../net/ethernet/mellanox/mlxsw/core_env.c | 20 ++++++------------- 1 file changed, 6 insertions(+), 14 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core_env.c b/drivers/net/ethernet/mellanox/mlxsw/core_env.c index 53b150b7ae4e..6c06b0592760 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core_env.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core_env.c @@ -1357,24 +1357,20 @@ static struct mlxsw_linecards_event_ops mlxsw_env_event_ops = { .got_inactive = mlxsw_env_got_inactive, }; -static int mlxsw_env_max_module_eeprom_len_query(struct mlxsw_env *mlxsw_env) +static void mlxsw_env_max_module_eeprom_len_query(struct mlxsw_env *mlxsw_env) { char mcam_pl[MLXSW_REG_MCAM_LEN]; - bool mcia_128b_supported; + bool mcia_128b_supported = false; int err; mlxsw_reg_mcam_pack(mcam_pl, MLXSW_REG_MCAM_FEATURE_GROUP_ENHANCED_FEATURES); err = mlxsw_reg_query(mlxsw_env->core, MLXSW_REG(mcam), mcam_pl); - if (err) - return err; - - mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_MCIA_128B, - &mcia_128b_supported); + if (!err) + mlxsw_reg_mcam_unpack(mcam_pl, MLXSW_REG_MCAM_MCIA_128B, + &mcia_128b_supported); mlxsw_env->max_eeprom_len = mcia_128b_supported ? 128 : 48; - - return 0; } int mlxsw_env_init(struct mlxsw_core *mlxsw_core, @@ -1445,15 +1441,11 @@ int mlxsw_env_init(struct mlxsw_core *mlxsw_core, if (err) goto err_type_set; - err = mlxsw_env_max_module_eeprom_len_query(env); - if (err) - goto err_eeprom_len_query; - + mlxsw_env_max_module_eeprom_len_query(env); env->line_cards[0]->active = true; return 0; -err_eeprom_len_query: err_type_set: mlxsw_env_module_event_disable(env, 0); err_mlxsw_env_module_event_enable: