diff mbox series

[net-next,02/12] mlxsw: Check Rx local port in PCI code

Message ID 1178743340cfb52bb763d5c671d4c9bf320534f8.1738665783.git.petrm@nvidia.com (mailing list archive)
State New
Delegated to: Netdev Maintainers
Headers show
Series mlxsw: Preparations for XDP support | expand

Checks

Context Check Description
netdev/series_format success Posting correctly formatted
netdev/tree_selection success Clearly marked for net-next
netdev/ynl success Generated files up to date; no warnings/errors; no diff in generated;
netdev/fixes_present success Fixes tag not required for -next series
netdev/header_inline success No static functions without inline keyword in header files
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/build_tools success No tools touched, skip
netdev/cc_maintainers success CCed 8 of 8 maintainers
netdev/build_clang success Errors and warnings before: 53 this patch: 53
netdev/verify_signedoff success Signed-off-by tag matches author and committer
netdev/deprecated_api success None detected
netdev/check_selftest success No net selftest shell script
netdev/verify_fixes success No Fixes tag
netdev/build_allmodconfig_warn success Errors and warnings before: 0 this patch: 0
netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 86 lines checked
netdev/build_clang_rust success No Rust files in patch. Skipping build
netdev/kdoc success Errors and warnings before: 0 this patch: 0
netdev/source_inline success Was 0 now: 0
netdev/contest success net-next-2025-02-04--15-00 (tests: 886)

Commit Message

Petr Machata Feb. 4, 2025, 11:04 a.m. UTC
From: Amit Cohen <amcohen@nvidia.com>

In case that a packet is received from port in a LAG, the CQE contains info
about the LAG and later, core code checks which local port is the Rx port.

To support XDP, such checking should be done also as part of PCI code, to
get the relevant XDP program according to Rx netdevice. There is no point
to check the mapping twice, as preparation for XDP support, check which is
the Rx local port as part of PCI code and fill this info in 'rx_info'.
Remove the unnecessary fields from 'rx_info'.

Handle 'rx_info.local_port' earlier in the code, as this info will be
used for XDP running, XDP will be handled in the code after handling
local port.

Signed-off-by: Amit Cohen <amcohen@nvidia.com>
Reviewed-by: Ido Schimmel <idosch@nvidia.com>
Signed-off-by: Petr Machata <petrm@nvidia.com>
---
 drivers/net/ethernet/mellanox/mlxsw/core.c | 18 +++---------------
 drivers/net/ethernet/mellanox/mlxsw/core.h |  7 +------
 drivers/net/ethernet/mellanox/mlxsw/pci.c  | 22 ++++++++++++----------
 3 files changed, 16 insertions(+), 31 deletions(-)
diff mbox series

Patch

diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c
index 8becb08984a6..392c0355d589 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.c
@@ -2944,29 +2944,17 @@  void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
 {
 	struct mlxsw_rx_listener_item *rxl_item;
 	const struct mlxsw_rx_listener *rxl;
-	u16 local_port;
 	bool found = false;
 
-	if (rx_info->is_lag) {
-		/* Upper layer does not care if the skb came from LAG or not,
-		 * so just get the local_port for the lag port and push it up.
-		 */
-		local_port = mlxsw_core_lag_mapping_get(mlxsw_core,
-							rx_info->u.lag_id,
-							rx_info->lag_port_index);
-	} else {
-		local_port = rx_info->u.sys_port;
-	}
-
 	if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) ||
-	    (local_port >= mlxsw_core->max_ports))
+	    (rx_info->local_port >= mlxsw_core->max_ports))
 		goto drop;
 
 	rcu_read_lock();
 	list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) {
 		rxl = &rxl_item->rxl;
 		if ((rxl->local_port == MLXSW_PORT_DONT_CARE ||
-		     rxl->local_port == local_port) &&
+		     rxl->local_port == rx_info->local_port) &&
 		    rxl->trap_id == rx_info->trap_id &&
 		    rxl->mirror_reason == rx_info->mirror_reason) {
 			if (rxl_item->enabled)
@@ -2979,7 +2967,7 @@  void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb,
 		goto drop;
 	}
 
-	rxl->func(skb, local_port, rxl_item->priv);
+	rxl->func(skb, rx_info->local_port, rxl_item->priv);
 	rcu_read_unlock();
 	return;
 
diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h
index 1a871397a6df..72eb7dbf57ce 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/core.h
+++ b/drivers/net/ethernet/mellanox/mlxsw/core.h
@@ -242,12 +242,7 @@  int mlxsw_reg_write(struct mlxsw_core *mlxsw_core,
 		    const struct mlxsw_reg_info *reg, char *payload);
 
 struct mlxsw_rx_info {
-	bool is_lag;
-	union {
-		u16 sys_port;
-		u16 lag_id;
-	} u;
-	u16 lag_port_index;
+	u16 local_port;
 	u8 mirror_reason;
 	int trap_id;
 };
diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c
index 5b44c931b660..55ef185c9f5a 100644
--- a/drivers/net/ethernet/mellanox/mlxsw/pci.c
+++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c
@@ -761,6 +761,18 @@  static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,
 	if (mlxsw_pci_cqe_crc_get(cqe_v, cqe))
 		byte_count -= ETH_FCS_LEN;
 
+	if (mlxsw_pci_cqe_lag_get(cqe_v, cqe)) {
+		u16 lag_id, lag_port_index;
+
+		lag_id = mlxsw_pci_cqe_lag_id_get(cqe_v, cqe);
+		lag_port_index = mlxsw_pci_cqe_lag_subport_get(cqe_v, cqe);
+		rx_info.local_port = mlxsw_core_lag_mapping_get(mlxsw_pci->core,
+								lag_id,
+								lag_port_index);
+	} else {
+		rx_info.local_port = mlxsw_pci_cqe_system_port_get(cqe);
+	}
+
 	err = mlxsw_pci_elem_info_pages_ref_store(q, elem_info, byte_count,
 						  pages, &num_sg_entries);
 	if (err)
@@ -779,16 +791,6 @@  static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci,
 
 	skb_mark_for_recycle(skb);
 
-	if (mlxsw_pci_cqe_lag_get(cqe_v, cqe)) {
-		rx_info.is_lag = true;
-		rx_info.u.lag_id = mlxsw_pci_cqe_lag_id_get(cqe_v, cqe);
-		rx_info.lag_port_index =
-			mlxsw_pci_cqe_lag_subport_get(cqe_v, cqe);
-	} else {
-		rx_info.is_lag = false;
-		rx_info.u.sys_port = mlxsw_pci_cqe_system_port_get(cqe);
-	}
-
 	rx_info.trap_id = mlxsw_pci_cqe_trap_id_get(cqe);
 
 	if (rx_info.trap_id == MLXSW_TRAP_ID_DISCARD_INGRESS_ACL ||