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Tue, 4 Feb 2025 03:06:18 -0800 Received: from fedora.mtl.com (10.126.231.35) by rnnvmail201.nvidia.com (10.129.68.8) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.1544.14; Tue, 4 Feb 2025 03:06:11 -0800 From: Petr Machata To: "David S. Miller" , Eric Dumazet , Jakub Kicinski , Paolo Abeni , Andrew Lunn , CC: Amit Cohen , Ido Schimmel , "Petr Machata" , Alexei Starovoitov , "Daniel Borkmann" , Jesper Dangaard Brouer , John Fastabend , , Subject: [PATCH net-next 02/12] mlxsw: Check Rx local port in PCI code Date: Tue, 4 Feb 2025 12:04:57 +0100 Message-ID: <1178743340cfb52bb763d5c671d4c9bf320534f8.1738665783.git.petrm@nvidia.com> X-Mailer: git-send-email 2.48.1 In-Reply-To: References: Precedence: bulk X-Mailing-List: bpf@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-ClientProxiedBy: rnnvmail203.nvidia.com (10.129.68.9) To rnnvmail201.nvidia.com (10.129.68.8) X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SN1PEPF000397AF:EE_|CYXPR12MB9318:EE_ X-MS-Office365-Filtering-Correlation-Id: 33eb6693-5ad3-46e3-b8fe-08dd450bf928 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0;ARA:13230040|1800799024|7416014|36860700013|376014|82310400026; X-Microsoft-Antispam-Message-Info: hB8o8Gq2H+1Ap0ZcLW+dsk78OeDbbE1AL9sudLMAom5m+AhSXCheIKFC2RhK6Q1Ji1aEHsqLAB2HH2AdJKE/dZpzHpeK9izMyLYj61eN9+NlYBoJ1FiccYCApjFeRwgPBC6+P7LSRMALHOcM2/eFkTizkVyw03xQpH2pQL7DpUW4/aUk7GA4ConkIRzs7thzknq5F4hfIt6fiITUHSjaEllKA3wmBEwG1r7BM22gvaFGI8oXLe0UQgQnI50ltza5kWcnRq2Qe0kOe2S4eIyAISsoWAyZtsGoblEyo6WL1zdLlujxjF/wE5xJrIJIJ0ToV4hg1aFhnTMFcheOHkhhav1t8bLndnq2DZD5Ri69tUjlw8YaTNxTG/AQxEUFMVRIQx6o/z9j+uZvkwfiqpDho9GswxvUh5y8kQA+eZnoF92UmMFAKQoQJGnEYAK87Qt+8DMIB/wwtJQVsEFfXJ9Ku7IR4e96EiJ0IxkBTSPxvQ1xu1pUM61EkiLfIk4WOhjgivvltzdeNX3w7M3JH80cWOqY8GKM35j8SCDcUfThK0A2fvcjS/75dhBtEBTp39PLhWhHE+2286BDXGHnxO1KdMCHP1J3eoG96BGQ4LK0ccBFZ20uuBZisVWvacZVSfnmWM2oCz5/DcWx6ssiHr0puCTTTLcLEZxoT2pVqDgIElv/rBil9lwV6dYle2Q0nE+dsX1KC5Qec1tz5M6yAr+nm5GzJ0twGxW0cHLhsaEDyF786ex3/n8gdvo6MZgqS9QrUySLUchUpxzQVxzz+9eIKWBQ979rYKnOn4h/BwvtRdi38Y2kQ8uYqpbLEWQuCQY8D5nDjDMDcAgIs2qXGLZ4qCSQc4F30sH5cOIh9ARa5/S6Txkr8nPBrPyqiJdTfEudZEWiLKjit8bfhyy7WdHujS7P86egR8Gnvam5S8gkfj0BscJuRSkNzhn7N34sv3pdz4EEQYUseiKlYDoNOMdUcq/VQAUkAJi6KuAWSJUxl9aTT3TiZy/H0+i2UW2g+hV+yZNC2Kvz+W7FecU7F3h5wk+4Ng6c5bAGYX2gsFgdAbXDTjZJFOIAxHFgmAyws3PgpyP8OS8LAg8wwfYkE9j+qMmUWvc4lOrYiKxuSnZArW22/wJ/vprTvrTs7gnISxufd9UJvDeCryfET+YS+NE5W1c2+wX9auRmc7HX9wxAHGgPudBd9WjzyjxaSa/xkUjk97YuPm1RJmEhbaUkxcLSM4fdXONMBPrkfM5GzLYiugpI6t5mY548JTXNsEvYkBe1Zpgf2LOIkPCQCi6gmPfd0uFRLQV9CfVvU0t60op3rAsRY2o7W6I0AEyi3sjiQGRFBdLioWdpm2GkBOeu+R+TmJGQ1wFv0Gq1qUwNL8xlUAR3dyqWql2GgZcZ0LPyKCk/wkwgyakbbJjsEPEokYn2RyGcCfQgXXNDTgTttebwkfq/YFsBicI5vF4gm2suM+fYftQ5s3ZI2aAvqbi7Lb5G1BAKyuNEvvdubjLnP9grZ7E= X-Forefront-Antispam-Report: CIP:216.228.117.161;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge2.nvidia.com;CAT:NONE;SFS:(13230040)(1800799024)(7416014)(36860700013)(376014)(82310400026);DIR:OUT;SFP:1101; X-OriginatorOrg: Nvidia.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 04 Feb 2025 11:06:28.2224 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 33eb6693-5ad3-46e3-b8fe-08dd450bf928 X-MS-Exchange-CrossTenant-Id: 43083d15-7273-40c1-b7db-39efd9ccc17a X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.161];Helo=[mail.nvidia.com] X-MS-Exchange-CrossTenant-AuthSource: SN1PEPF000397AF.namprd05.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: CYXPR12MB9318 X-Patchwork-Delegate: kuba@kernel.org From: Amit Cohen In case that a packet is received from port in a LAG, the CQE contains info about the LAG and later, core code checks which local port is the Rx port. To support XDP, such checking should be done also as part of PCI code, to get the relevant XDP program according to Rx netdevice. There is no point to check the mapping twice, as preparation for XDP support, check which is the Rx local port as part of PCI code and fill this info in 'rx_info'. Remove the unnecessary fields from 'rx_info'. Handle 'rx_info.local_port' earlier in the code, as this info will be used for XDP running, XDP will be handled in the code after handling local port. Signed-off-by: Amit Cohen Reviewed-by: Ido Schimmel Signed-off-by: Petr Machata --- drivers/net/ethernet/mellanox/mlxsw/core.c | 18 +++--------------- drivers/net/ethernet/mellanox/mlxsw/core.h | 7 +------ drivers/net/ethernet/mellanox/mlxsw/pci.c | 22 ++++++++++++---------- 3 files changed, 16 insertions(+), 31 deletions(-) diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.c b/drivers/net/ethernet/mellanox/mlxsw/core.c index 8becb08984a6..392c0355d589 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core.c +++ b/drivers/net/ethernet/mellanox/mlxsw/core.c @@ -2944,29 +2944,17 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, { struct mlxsw_rx_listener_item *rxl_item; const struct mlxsw_rx_listener *rxl; - u16 local_port; bool found = false; - if (rx_info->is_lag) { - /* Upper layer does not care if the skb came from LAG or not, - * so just get the local_port for the lag port and push it up. - */ - local_port = mlxsw_core_lag_mapping_get(mlxsw_core, - rx_info->u.lag_id, - rx_info->lag_port_index); - } else { - local_port = rx_info->u.sys_port; - } - if ((rx_info->trap_id >= MLXSW_TRAP_ID_MAX) || - (local_port >= mlxsw_core->max_ports)) + (rx_info->local_port >= mlxsw_core->max_ports)) goto drop; rcu_read_lock(); list_for_each_entry_rcu(rxl_item, &mlxsw_core->rx_listener_list, list) { rxl = &rxl_item->rxl; if ((rxl->local_port == MLXSW_PORT_DONT_CARE || - rxl->local_port == local_port) && + rxl->local_port == rx_info->local_port) && rxl->trap_id == rx_info->trap_id && rxl->mirror_reason == rx_info->mirror_reason) { if (rxl_item->enabled) @@ -2979,7 +2967,7 @@ void mlxsw_core_skb_receive(struct mlxsw_core *mlxsw_core, struct sk_buff *skb, goto drop; } - rxl->func(skb, local_port, rxl_item->priv); + rxl->func(skb, rx_info->local_port, rxl_item->priv); rcu_read_unlock(); return; diff --git a/drivers/net/ethernet/mellanox/mlxsw/core.h b/drivers/net/ethernet/mellanox/mlxsw/core.h index 1a871397a6df..72eb7dbf57ce 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/core.h +++ b/drivers/net/ethernet/mellanox/mlxsw/core.h @@ -242,12 +242,7 @@ int mlxsw_reg_write(struct mlxsw_core *mlxsw_core, const struct mlxsw_reg_info *reg, char *payload); struct mlxsw_rx_info { - bool is_lag; - union { - u16 sys_port; - u16 lag_id; - } u; - u16 lag_port_index; + u16 local_port; u8 mirror_reason; int trap_id; }; diff --git a/drivers/net/ethernet/mellanox/mlxsw/pci.c b/drivers/net/ethernet/mellanox/mlxsw/pci.c index 5b44c931b660..55ef185c9f5a 100644 --- a/drivers/net/ethernet/mellanox/mlxsw/pci.c +++ b/drivers/net/ethernet/mellanox/mlxsw/pci.c @@ -761,6 +761,18 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci, if (mlxsw_pci_cqe_crc_get(cqe_v, cqe)) byte_count -= ETH_FCS_LEN; + if (mlxsw_pci_cqe_lag_get(cqe_v, cqe)) { + u16 lag_id, lag_port_index; + + lag_id = mlxsw_pci_cqe_lag_id_get(cqe_v, cqe); + lag_port_index = mlxsw_pci_cqe_lag_subport_get(cqe_v, cqe); + rx_info.local_port = mlxsw_core_lag_mapping_get(mlxsw_pci->core, + lag_id, + lag_port_index); + } else { + rx_info.local_port = mlxsw_pci_cqe_system_port_get(cqe); + } + err = mlxsw_pci_elem_info_pages_ref_store(q, elem_info, byte_count, pages, &num_sg_entries); if (err) @@ -779,16 +791,6 @@ static void mlxsw_pci_cqe_rdq_handle(struct mlxsw_pci *mlxsw_pci, skb_mark_for_recycle(skb); - if (mlxsw_pci_cqe_lag_get(cqe_v, cqe)) { - rx_info.is_lag = true; - rx_info.u.lag_id = mlxsw_pci_cqe_lag_id_get(cqe_v, cqe); - rx_info.lag_port_index = - mlxsw_pci_cqe_lag_subport_get(cqe_v, cqe); - } else { - rx_info.is_lag = false; - rx_info.u.sys_port = mlxsw_pci_cqe_system_port_get(cqe); - } - rx_info.trap_id = mlxsw_pci_cqe_trap_id_get(cqe); if (rx_info.trap_id == MLXSW_TRAP_ID_DISCARD_INGRESS_ACL ||