diff mbox series

[v8,net-next,02/15] dts: marvell: add CM3 SRAM memory to cp11x ethernet device tree

Message ID 1612629961-11583-3-git-send-email-stefanc@marvell.com (mailing list archive)
State Superseded
Delegated to: Netdev Maintainers
Headers show
Series net: mvpp2: Add TX Flow Control support | expand

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netdev/cc_maintainers fail 5 maintainers not CCed: devicetree@vger.kernel.org robh+dt@kernel.org sebastian.hesselbarth@gmail.com gregory.clement@bootlin.com linux-arm-kernel@lists.infradead.org
netdev/source_inline success Was 0 now: 0
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netdev/module_param success Was 0 now: 0
netdev/build_32bit success Errors and warnings before: 0 this patch: 0
netdev/kdoc success Errors and warnings before: 0 this patch: 0
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netdev/checkpatch success total: 0 errors, 0 warnings, 0 checks, 22 lines checked
netdev/build_allmodconfig_warn success Errors and warnings before: 0 this patch: 0
netdev/header_inline success Link
netdev/stable success Stable not CCed

Commit Message

Stefan Chulski Feb. 6, 2021, 4:45 p.m. UTC 
From: Konstantin Porotchkin <kostap@marvell.com>

CM3 SRAM address space would be used for Flow Control configuration.

Signed-off-by: Stefan Chulski <stefanc@marvell.com>
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
---
 arch/arm64/boot/dts/marvell/armada-cp11x.dtsi | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Jakub Kicinski Feb. 6, 2021, 11:40 p.m. UTC | #1 
On Sat, 6 Feb 2021 18:45:48 +0200 stefanc@marvell.com wrote:
> From: Konstantin Porotchkin <kostap@marvell.com>
> 
> CM3 SRAM address space would be used for Flow Control configuration.
> 
> Signed-off-by: Stefan Chulski <stefanc@marvell.com>
> Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>

Isn't there are requirement to CC the DT mailing list and Rob on all
device tree patches?  Maybe someone can clarify I know it's required
when adding bindings..
Stefan Chulski Feb. 7, 2021, 7:56 a.m. UTC | #2 
> ----------------------------------------------------------------------
> On Sat, 6 Feb 2021 18:45:48 +0200 stefanc@marvell.com wrote:
> > From: Konstantin Porotchkin <kostap@marvell.com>
> >
> > CM3 SRAM address space would be used for Flow Control configuration.
> >
> > Signed-off-by: Stefan Chulski <stefanc@marvell.com>
> > Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
> 
> Isn't there are requirement to CC the DT mailing list and Rob on all device
> tree patches?  Maybe someone can clarify I know it's required when adding
> bindings..

I would repost with robh+dt@kernel.org, gregory.clement@bootlin.com and devicetree@vger.kernel.org in CC

Thanks,
Stefan.
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
index 9dcf16b..359cf42 100644
--- a/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-cp11x.dtsi
@@ -69,6 +69,8 @@ 
 			status = "disabled";
 			dma-coherent;
 
+			cm3-mem = <&CP11X_LABEL(cm3_sram)>;
+
 			CP11X_LABEL(eth0): eth0 {
 				interrupts = <39 IRQ_TYPE_LEVEL_HIGH>,
 					<43 IRQ_TYPE_LEVEL_HIGH>,
@@ -211,6 +213,14 @@ 
 			};
 		};
 
+		CP11X_LABEL(cm3_sram): cm3@220000 {
+			compatible = "mmio-sram";
+			reg = <0x220000 0x800>;
+			#address-cells = <1>;
+			#size-cells = <1>;
+			ranges = <0 0x220000 0x800>;
+		};
+
 		CP11X_LABEL(rtc): rtc@284000 {
 			compatible = "marvell,armada-8k-rtc";
 			reg = <0x284000 0x20>, <0x284080 0x24>;