@@ -763,6 +763,7 @@ struct hnae3_knic_private_info {
u16 num_tx_desc;
u16 num_rx_desc;
u32 tx_spare_buf_size;
+ u32 devlink_tx_spare_buf_size;
struct hnae3_tc_info tc_info;
@@ -1037,8 +1037,12 @@ static void hns3_init_tx_spare_buffer(struct hns3_enet_ring *ring)
dma_addr_t dma;
int order;
- alloc_size = tx_spare_buf_size ? tx_spare_buf_size :
- ring->tqp->handle->kinfo.tx_spare_buf_size;
+ if (ring->tqp->handle->kinfo.devlink_tx_spare_buf_size)
+ alloc_size = ring->tqp->handle->kinfo.devlink_tx_spare_buf_size;
+ else if (tx_spare_buf_size)
+ alloc_size = tx_spare_buf_size;
+ else
+ alloc_size = ring->tqp->handle->kinfo.tx_spare_buf_size;
if (!alloc_size)
return;
@@ -34,6 +34,37 @@ static int hclge_devlink_info_get(struct devlink *devlink,
version_str);
}
+static void hclge_devlink_get_param_setting(struct devlink *devlink)
+{
+ struct hclge_devlink_priv *priv = devlink_priv(devlink);
+ struct hclge_dev *hdev = priv->hdev;
+ struct pci_dev *pdev = hdev->pdev;
+ union devlink_param_value val;
+ int i, ret;
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ &val);
+ if (!ret) {
+ hdev->rx_buf_len = val.vu32;
+ hdev->vport->nic.kinfo.rx_buf_len = hdev->rx_buf_len;
+ for (i = 0; i < hdev->num_tqps; i++)
+ hdev->htqp[i].q.buf_size = hdev->rx_buf_len;
+ } else {
+ dev_err(&pdev->dev,
+ "failed to get rx buffer size, ret = %d\n", ret);
+ }
+
+ ret = devlink_param_driverinit_value_get(devlink,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ &val);
+ if (!ret)
+ hdev->vport->nic.kinfo.devlink_tx_spare_buf_size = val.vu32;
+ else
+ dev_err(&pdev->dev,
+ "failed to get tx buffer size, ret = %d\n", ret);
+}
+
static int hclge_devlink_reload_down(struct devlink *devlink, bool netns_change,
enum devlink_reload_action action,
enum devlink_reload_limit limit,
@@ -105,6 +136,49 @@ static const struct devlink_ops hclge_devlink_ops = {
.reload_up = hclge_devlink_reload_up,
};
+static int hclge_devlink_rx_buffer_size_validate(struct devlink *devlink,
+ u32 id,
+ union devlink_param_value val,
+ struct netlink_ext_ack *extack)
+{
+#define HCLGE_RX_BUF_LEN_2K 2048
+#define HCLGE_RX_BUF_LEN_4K 4096
+
+ if (val.vu32 != HCLGE_RX_BUF_LEN_2K &&
+ val.vu32 != HCLGE_RX_BUF_LEN_4K) {
+ NL_SET_ERR_MSG_MOD(extack, "Supported size is 2048 or 4096");
+ return -EOPNOTSUPP;
+ }
+
+ return 0;
+}
+
+static const struct devlink_param hclge_devlink_params[] = {
+ DEVLINK_PARAM_DRIVER(HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ "rx_buffer_len", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL,
+ hclge_devlink_rx_buffer_size_validate),
+ DEVLINK_PARAM_DRIVER(HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ "tx_buffer_size", DEVLINK_PARAM_TYPE_U32,
+ BIT(DEVLINK_PARAM_CMODE_DRIVERINIT),
+ NULL, NULL, NULL),
+};
+
+void hclge_devlink_set_params_init_values(struct hclge_dev *hdev)
+{
+ union devlink_param_value value;
+
+ value.vu32 = hdev->rx_buf_len;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ value);
+ value.vu32 = hdev->tx_spare_buf_size;
+ devlink_param_driverinit_value_set(hdev->devlink,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+ value);
+}
+
int hclge_devlink_init(struct hclge_dev *hdev)
{
struct pci_dev *pdev = hdev->pdev;
@@ -129,10 +203,20 @@ int hclge_devlink_init(struct hclge_dev *hdev)
hdev->devlink = devlink;
+ ret = devlink_params_register(devlink, hclge_devlink_params,
+ ARRAY_SIZE(hclge_devlink_params));
+ if (ret) {
+ dev_err(&pdev->dev,
+ "failed to register devlink params, ret = %d\n", ret);
+ goto out_param_reg_fail;
+ }
+
devlink_reload_enable(devlink);
return 0;
-
+out_param_reg_fail:
+ hdev->devlink = NULL;
+ devlink_unregister(devlink);
out_reg_fail:
devlink_free(devlink);
return ret;
@@ -147,6 +231,8 @@ void hclge_devlink_uninit(struct hclge_dev *hdev)
devlink_reload_disable(devlink);
+ devlink_params_unregister(devlink, hclge_devlink_params,
+ ARRAY_SIZE(hclge_devlink_params));
devlink_unregister(devlink);
devlink_free(devlink);
@@ -6,10 +6,17 @@
#include "hclge_main.h"
+enum hclge_devlink_param_id {
+ HCLGE_DEVLINK_PARAM_ID_BASE = DEVLINK_PARAM_GENERIC_ID_MAX,
+ HCLGE_DEVLINK_PARAM_ID_RX_BUF_LEN,
+ HCLGE_DEVLINK_PARAM_ID_TX_BUF_SIZE,
+};
+
struct hclge_devlink_priv {
struct hclge_dev *hdev;
};
int hclge_devlink_init(struct hclge_dev *hdev);
+void hclge_devlink_set_params_init_values(struct hclge_dev *hdev);
void hclge_devlink_uninit(struct hclge_dev *hdev);
#endif
@@ -11510,6 +11510,9 @@ static int hclge_init_ae_dev(struct hnae3_ae_dev *ae_dev)
goto err_cmd_uninit;
}
+ hclge_devlink_set_params_init_values(hdev);
+ devlink_params_publish(hdev->devlink);
+
ret = hclge_init_msi(hdev);
if (ret) {
dev_err(&pdev->dev, "Init MSI/MSI-X error, ret = %d.\n", ret);