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Fri, 17 Nov 2023 03:29:59 -0600 From: Srinivas Goud To: , , , , , , , , , CC: , , , , , , , , , "Srinivas Goud" Subject: [PATCH v5 3/3] can: xilinx_can: Add ethtool stats interface for ECC errors Date: Fri, 17 Nov 2023 14:58:56 +0530 Message-ID: <1700213336-652-4-git-send-email-srinivas.goud@amd.com> X-Mailer: git-send-email 2.1.1 In-Reply-To: <1700213336-652-1-git-send-email-srinivas.goud@amd.com> References: <1700213336-652-1-git-send-email-srinivas.goud@amd.com> Precedence: bulk X-Mailing-List: netdev@vger.kernel.org List-Id: List-Subscribe: List-Unsubscribe: MIME-Version: 1.0 X-EOPAttributedMessage: 0 X-MS-PublicTrafficType: Email X-MS-TrafficTypeDiagnostic: SA2PEPF000015C8:EE_|BL3PR12MB6619:EE_ X-MS-Office365-Filtering-Correlation-Id: 5a075f94-b650-4b82-72d8-08dbe74fca76 X-MS-Exchange-SenderADCheck: 1 X-MS-Exchange-AntiSpam-Relay: 0 X-Microsoft-Antispam: BCL:0; X-Microsoft-Antispam-Message-Info: GUMDBJYBwDNCsU3pvkF0h1D15Q2al5FQizTTa4vynbJZoz+oFQEqU8GVNP20PjS/qBcQ4dJo9QCFwwQ17yll/xg48QG8+Wgnb5Fqjyhix10ka2vvppaeiL9yAlNNraGUhwLld+Q514Agei0WJZeMZFVzs+1Twaj3+VmvE6mVCWkFHipQlhz5eo0ptIZr4Rzq33fjOiiBGVeITYGn0Nc/3ierFop5AVWgkCGGQnfxJWMEoLsBeh31R8NmW4+nB2TWFc4OWBUXQcRyZwKftMTGejSvFBfT2+K5+6djNhSouGeWWD2xLS8eBfNuSliaCUWFziVm8kMnG3GdnMmfDfwb9wOTgxqKJS9tNmZj7ZQYM8K2T8KPTVQNjqd7IDqLlbVTY8zSv4crxUH7Dt1lHWuaq7NwrXDou3+l0MuzroxRlVqvBIzh2M7M7qwvfWBOjRE3gW+6Wj8ePsc13eYM7r5ri6miDxRXo67RN4ZYjH6suId0BYkJhqpZHWy1KqBzbpNNZmBNR4l5h6onyz2DUzA0jbf1cK8IFRmk6jKjttsCTV0czmReLMmusQ1RV1zcIqvvpQ2jZO4b5BOJD+/fB2YTWIZqYA2G4FSd9RqYCcOLVPZIbmFb7ZSG3EwASqDPcBCoVPdE7hPrxags4dFugqLsvFwiNTJlOXlgYq4jCItO0aZySdaB18JmGD5FatOV7M6gUTISLazC3jJrX7OL4vQrUrjscUWAr7cpQWYGIWi2gvLjP79IGsXeh9YBU5riRX2FSYytHoiRZbGpNrUAnNXV6uz3r/3PzAF3zlVv21VUyxk= X-Forefront-Antispam-Report: CIP:165.204.84.17;CTRY:US;LANG:en;SCL:1;SRV:;IPV:CAL;SFV:NSPM;H:SATLEXMB03.amd.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230031)(4636009)(136003)(39860400002)(376002)(346002)(396003)(230922051799003)(1800799009)(451199024)(186009)(82310400011)(64100799003)(36840700001)(40470700004)(46966006)(41300700001)(44832011)(36756003)(40460700003)(2906002)(7416002)(5660300002)(86362001)(921008)(2616005)(26005)(40480700001)(83380400001)(82740400003)(336012)(426003)(6666004)(478600001)(47076005)(81166007)(356005)(36860700001)(316002)(54906003)(4326008)(8676002)(8936002)(70206006)(70586007)(110136005)(36900700001);DIR:OUT;SFP:1101; X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-OriginalArrivalTime: 17 Nov 2023 09:30:08.7625 (UTC) X-MS-Exchange-CrossTenant-Network-Message-Id: 5a075f94-b650-4b82-72d8-08dbe74fca76 X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp: TenantId=3dd8961f-e488-4e60-8e11-a82d994e183d;Ip=[165.204.84.17];Helo=[SATLEXMB03.amd.com] X-MS-Exchange-CrossTenant-AuthSource: SA2PEPF000015C8.namprd03.prod.outlook.com X-MS-Exchange-CrossTenant-AuthAs: Anonymous X-MS-Exchange-CrossTenant-FromEntityHeader: HybridOnPrem X-MS-Exchange-Transport-CrossTenantHeadersStamped: BL3PR12MB6619 X-Patchwork-Delegate: kuba@kernel.org Add ethtool stats interface for reading FIFO 1bit/2bit ECC errors information. Signed-off-by: Srinivas Goud --- Changes in v5: Address review comments Add get_strings and get_sset_count stats interface Use u64 stats helper function Changes in v4: None Changes in v3: None Changes in v2: Add ethtool stats interface drivers/net/can/xilinx_can.c | 54 ++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 54 insertions(+) diff --git a/drivers/net/can/xilinx_can.c b/drivers/net/can/xilinx_can.c index c8691a1..40c912b 100644 --- a/drivers/net/can/xilinx_can.c +++ b/drivers/net/can/xilinx_can.c @@ -228,6 +228,7 @@ struct xcan_devtype_data { * @transceiver: Optional pointer to associated CAN transceiver * @rstc: Pointer to reset control * @ecc_enable: ECC enable flag + * @stats_lock: Lock for synchronizing ECC errors stats * @ecc_2bit_rxfifo_cnt: RXFIFO 2bit ECC count * @ecc_1bit_rxfifo_cnt: RXFIFO 1bit ECC count * @ecc_2bit_txolfifo_cnt: TXOLFIFO 2bit ECC count @@ -254,6 +255,7 @@ struct xcan_priv { struct phy *transceiver; struct reset_control *rstc; bool ecc_enable; + spinlock_t stats_lock; /* Lock for synchronizing ECC errors stats */ u64_stats_t ecc_2bit_rxfifo_cnt; u64_stats_t ecc_1bit_rxfifo_cnt; u64_stats_t ecc_2bit_txolfifo_cnt; @@ -347,6 +349,12 @@ static const struct can_tdc_const xcan_tdc_const_canfd2 = { .tdcf_max = 0, }; +static const char xcan_priv_flags_strings[][ETH_GSTRING_LEN] = { + "err-ecc-rx-2-bit", "err-ecc-rx-1-bit", + "err-ecc-txol-2-bit", "err-ecc-txol-1-bit", + "err-ecc-txtl-2-bit", "err-ecc-txtl-1-bit", +}; + /** * xcan_write_reg_le - Write a value to the device register little endian * @priv: Driver private data structure @@ -1171,6 +1179,9 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) if (priv->ecc_enable && isr & XCAN_IXR_ECC_MASK) { u32 reg_rx_ecc, reg_txol_ecc, reg_txtl_ecc; + unsigned long flags; + + spin_lock_irqsave(&priv->stats_lock, flags); reg_rx_ecc = priv->read_reg(priv, XCAN_RXFIFO_ECC_OFFSET); reg_txol_ecc = priv->read_reg(priv, XCAN_TXOLFIFO_ECC_OFFSET); @@ -1182,6 +1193,8 @@ static void xcan_err_interrupt(struct net_device *ndev, u32 isr) priv->write_reg(priv, XCAN_ECC_CFG_OFFSET, XCAN_ECC_CFG_REECRX_MASK | XCAN_ECC_CFG_REECTXOL_MASK | XCAN_ECC_CFG_REECTXTL_MASK); + spin_unlock_irqrestore(&priv->stats_lock, flags); + if (isr & XCAN_IXR_E2BERX_MASK) { u64_stats_add(&priv->ecc_2bit_rxfifo_cnt, FIELD_GET(XCAN_ECC_2BIT_CNT_MASK, reg_rx_ecc)); @@ -1637,6 +1650,44 @@ static int xcan_get_auto_tdcv(const struct net_device *ndev, u32 *tdcv) return 0; } +static void xcan_get_strings(struct net_device *ndev, u32 stringset, u8 *buf) +{ + switch (stringset) { + case ETH_SS_STATS: + memcpy(buf, &xcan_priv_flags_strings, + sizeof(xcan_priv_flags_strings)); + } +} + +static int xcan_get_sset_count(struct net_device *netdev, int sset) +{ + switch (sset) { + case ETH_SS_STATS: + return ARRAY_SIZE(xcan_priv_flags_strings); + default: + return -EOPNOTSUPP; + } +} + +static void xcan_get_ethtool_stats(struct net_device *ndev, + struct ethtool_stats *stats, u64 *data) +{ + struct xcan_priv *priv = netdev_priv(ndev); + unsigned long flags; + int i = 0; + + spin_lock_irqsave(&priv->stats_lock, flags); + + data[i++] = u64_stats_read(&priv->ecc_2bit_rxfifo_cnt); + data[i++] = u64_stats_read(&priv->ecc_1bit_rxfifo_cnt); + data[i++] = u64_stats_read(&priv->ecc_2bit_txolfifo_cnt); + data[i++] = u64_stats_read(&priv->ecc_1bit_txolfifo_cnt); + data[i++] = u64_stats_read(&priv->ecc_2bit_txtlfifo_cnt); + data[i++] = u64_stats_read(&priv->ecc_1bit_txtlfifo_cnt); + + spin_unlock_irqrestore(&priv->stats_lock, flags); +} + static const struct net_device_ops xcan_netdev_ops = { .ndo_open = xcan_open, .ndo_stop = xcan_close, @@ -1646,6 +1697,9 @@ static const struct net_device_ops xcan_netdev_ops = { static const struct ethtool_ops xcan_ethtool_ops = { .get_ts_info = ethtool_op_get_ts_info, + .get_strings = xcan_get_strings, + .get_sset_count = xcan_get_sset_count, + .get_ethtool_stats = xcan_get_ethtool_stats, }; /**